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Kiran Kintali

Last seen: Today 2011 이후 활성

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답변 있음
HDLcoder ignores coder.const
You can find examples of HDL Coder friendly designs with coder.load and coder.const in the attachment.

약 15시간 전 | 0

답변 있음
MATLAB HDL Coder build error: C compiler produced errors
You can use this helper command to copy any of the HDL Coder friendly MATLAB demo files matlab\toolbox\hdlcoder\hdlcoderdemos\ma...

약 15시간 전 | 0

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How do I find the peak of a signal and the time of peak?
Sharing HDL Coder compatible Peak Detector example here. https://www.mathworks.com/matlabcentral/fileexchange/69651-hdl-coder-s...

약 15시간 전 | 0

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RAM based circular shift register in Simulink
If you are looking to model delay length via input port using RMA you could use the following style of modeling pattern. ...

약 15시간 전 | 0

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run Simscape HDL Workflow Advisor from script
>> type matlab/toolbox/hdlcoder/hdlcoderdemos/simscapehdldemos/getSSC2HDLSynthesisResults.m This example file shows the workf...

18일 전 | 0

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dsp.fft system object unbounded in a for loop
The functions fft() and dsp.fft() do not support HDL streaming interface. You can consider using dsphdl.fft or build a custom F...

19일 전 | 0

답변 있음
Build Standalone application for Zynq 706
There are several product examples that show case how to deploy HDL Coder generated code to target ZC706 board. Check this exam...

19일 전 | 1

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Simulink DSP Simulations with Noise: Looking for best practices
You might want to get started with this HDL Coder Evaluation Reference Guide https://www.mathworks.com/matlabcentral/fileexch...

19일 전 | 1

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Why do I get the error: " FIL cosimulation failed: the output does not match the expeced result" when I run FPGA-in-the-Loop Test?
If the HDL Code you are running is run with is generated from HDL Coder and is not matching the MATLAB or Simulink testbench the...

19일 전 | 0

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dsp.FFT does not work with HDL coder
dsphdl.FFT ships with DSP HDL Toolbox. You can also find some examples of how to write custom FFT in MATLAB suitable for HDL Co...

20일 전 | 0

| 수락됨

답변 있음
I2C Master block in SOC FPGA
Please find attached a sample example of I2C Master and Slave model blocks with behavioral plant models for IMUs. You can also ...

28일 전 | 0

| 수락됨

답변 있음
how to use I2C master block in HDL Code
Please find attached a sample example of I2C Master and Slave model blocks with behavioral plant models for IMUs. You can also ...

28일 전 | 0

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How to access HDL coder in Matlab trial version for college use ?
Reach out to support team for trial/install issues.

약 1달 전 | 0

답변 있음
face this error when wanna generate HDL coder "The Block/HDLImplementation pair: ('built-in/Reference', 'Module') is not registered in the implementation database."
Please reach out to support@mathworks.com This seems to be some sort of installation issue.

약 1달 전 | 0

답변 있음
PWM IP core FPGA
You can use core Simulink blocks to build a waveform of your choice.

약 1달 전 | 0

| 수락됨

답변 있음
HDL QAM Transmitter and Receiver simulation problem
Please reach out to tech support for further support on this question. Thanks

약 1달 전 | 0

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Pipelining using HDL Coder
Can you share some sample code and the project file? if the critical path is within optimized IP such as hdl.FFT distributed pi...

약 1달 전 | 0

답변 있음
How to solve Algebric loop error without adding delay.
HDL Coder supports various memory interfaces including AXI4 and DDR memory access. https://www.mathworks.com/help/hdlcoder/ug/p...

약 1달 전 | 0

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How to use signed bitconcat and bitsliceget?
The bitwise operator functions such as bitsliceget and bitconcat operate on underlying stored integer bits. Once bitwise operat...

약 1달 전 | 0

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Problem in generating reusable Verilog code using Simulink HDL Coder
Feel free to reach out to technical support for this question. You may want to try to use the new subsystem reuse algorithm ava...

약 2달 전 | 0

답변 있음
Fast compilation Simulink Model : Recommeded Configuration of PC
It would be best to reach out to MathWorks support on this question.

2달 전 | 0

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Usage of HDL and HLS blocks in same SystemGenerator for DSP design
can you share your model? Are you looking for a solution similar to this? https://www.mathworks.com/help/hdlcoder/ug/using-xil...

2달 전 | 0

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How to serialize an HDL Coder function with a vector input ?
Can you share you algorithm? You would need to share a design.m and a testbech.m files. Thanks

2달 전 | 0

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fixed point taylor sine/cosine approximation model
HDL Coder supports code generation for single precision trigonometric functions. Getting Started with HDL Coder Native Floatin...

3달 전 | 0

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Which versions of Xilinx Vivado are supported with which release of HDL Workflow Advisor?
https://www.mathworks.com/help/hdlcoder/supported-hardware.html The supported official versions of Simulation and Synthesis too...

3달 전 | 0

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Bitstream generation problem in HDL coder
Is it possible to attach a sample model? Feel free to reach out to MathWorks technical support on this question.

3달 전 | 0

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up sample Simulink doesn't implement rate convertion on hdl coder
Please share your model. I do not see any such errors with a basic model with your sample settings.

3달 전 | 0

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Can HDL coder produce code for unit delay with initial condition input
This feature is not currently supported and is on the future HDL Coder roadmap. For the block 'model/DUTSubsystem/Delay' ...

3달 전 | 0

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PMSM is programed in FPGA using HDL coder.
In the motor control demo project the current control algorithm and speed control runs on FPGA and processor respectively and th...

3달 전 | 0

| 수락됨

답변 있음
PMSM is programed in FPGA using HDL coder.
I think you are referring to this example. https://www.mathworks.com/videos/deploy-motor-control-algorithms-to-fpga-hardware-pro...

4달 전 | 0

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