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Kiran Kintali

Last seen: Today |  2011년부터 활동

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I see the following error message in HDL Workflow Advisor
Can you share reproduction steps? Thanks

약 11시간 전 | 0

답변 있음
When using Simulink External Mode with an AXI4-Stream IIO Read block, if the timeout value is greater than zero, it cause the simulation time to be slower than actual time
The timeout behavior is expected, the timeout leads to overrun in the software task and so the time step will get out of sync wi...

1일 전 | 0

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Issue in HDL Coder
t = 1:10; x = [4 8 6 -1 -2 -3 -1 3 4 5]; yc = movmean(x,5); plot(t,x,t,yc); The movemean fun...

5일 전 | 0

답변 있음
Issue in HDL Coder
Can you share the design, testbench and project files? Feel free to reach out to MathWorks tech support or DM me with the repro...

5일 전 | 0

답변 있음
Errors : algebraic loop in use HDL simulink coder
https://www.mathworks.com/matlabcentral/answers/95310-what-are-algebraic-loops-in-simulink-and-how-do-i-solve-them Models with ...

5일 전 | 0

답변 있음
error HDL compilation failed
Can you check if all the design files are added to the filWizard? There seems to be a pilot error and some package files are mis...

10일 전 | 0

답변 있음
select MIcrochip Libero as target and get error saying "Index exceeds the number of array elements. Index must not exceed 0."
https://www.mathworks.com/support/bugreports/2772641 This is a known issue addressed in the R2022b Update3 and the recent R20...

12일 전 | 1

답변 있음
Assertion failed: b:\matlab\src\cgir_hdl\target_analysis\characterizationkeygenerator.cpp:45:val
https://www.mathworks.com/help/hdlcoder/ug/find-estimated-critical-paths-without-synthesis-tools.html Critical Path Estimation ...

26일 전 | 0

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MATLAB compatibility with VIVADO 2018.2 and VIVADO 2019.2
https://www.mathworks.com/matlabcentral/answers/518421-which-versions-of-xilinx-vivado-are-supported-with-which-release-of-hdl-c...

26일 전 | 0

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Error Goto/From connections subsystem boundaries
https://www.mathworks.com/help/hdlcoder/ug/deploy-buck-converter-to-speedgoat-io-modules-workflow-script.html Deploy Simscape...

26일 전 | 0

답변 있음
Unsupported dimensions of matrix type at output port 0
Matrices are supported at the DUT boundary in HDL Coder https://www.mathworks.com/help/hdlcoder/io-optimization.html?s_tid=CRUX...

27일 전 | 0

답변 있음
Introduce Zybo board in Simulink HDL coder workflow advisor
https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-zynq-workflow.html This ex...

27일 전 | 0

답변 있음
I am having a problem in converting matlab to vhdl code
Consider reviewing the example below for best practices for MATLAB to HDL code generation. >> mlhdlc_demo_setup('mlhdlc_fft_cha...

27일 전 | 0

답변 있음
xilinx blockset is not shown in simulink library
https://www.xilinx.com/products/design-tools/vitis/vitis-model-composer.html Vitis Model Composer by: Xilinx, Inc Vitis™ Mode...

27일 전 | 0

답변 있음
Simulink models to Verilog HDL coder
Matrix IO is now supported with HDL Coder https://www.mathworks.com/help/hdlcoder/io-optimization.html?s_tid=CRUX_topnav htt...

27일 전 | 0

답변 있음
Xilinx Zynq ZCU104 evaluation board support
Customizing HDL Coder workflow for ZCU104 board: https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-an...

27일 전 | 0

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SoC Builder fails to deploy on Xilinx ZCU104 FPGA Board
HDL Coder workflow to add a custom ZCU104 board https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and...

27일 전 | 0

답변 있음
Adding Xilinx ZCU104 board to SoC Blockset
Customizing the HDL Coder workflow for ZCU104 board: https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-boar...

27일 전 | 0

답변 있음
Deep Learning HDL Toolbox - HDL generation
https://www.mathworks.com/help/deep-learning-hdl/ug/define-custom-board-and-reference-design-for-dl-ip-core-workflow.html Deep ...

28일 전 | 0

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답변 있음
E310/HDL Coder - How can I design a model where the ARM application individually requests frames of samples from the E310 Receiver/FPGA?
HW/SW Codesign workflow of SDR algorithms for USRP™ embedded series radio hardware This guide helps you to deploy partitioned...

약 1달 전 | 0

답변 있음
How to convert the Simulink project to VHDL code?
Implement Digital Downconverter for FPGA This example shows how to design a digital downconverter (DDC) for radio communication...

약 1달 전 | 0

답변 있음
MATLAB stuck when HDL coder converted the model to Verilog
Can you share your model or reach out to tech support for further guidance on the topic? In general this model seems to be usin...

약 1달 전 | 0

답변 있음
Compiling fixedpt converted code into VHDL
https://www.mathworks.com/help/hdlcoder/gs/generate-hdl-code-from-matlab-code-using-the-command-line-interface.html Generate HD...

약 1달 전 | 0

답변 있음
HDL coder error,Call to function 'fmod' is not supported for HDL code generation,
This message scenerio happens when HDL Coder finds an unsupported function error. Can you share a sample MATLAB code and Testb...

약 1달 전 | 0

답변 있음
In Simulink HDLcoder, which converts a model into a hardware description language, it's stuck in this interface
I wonder if the model has unsupported constructs for HDL Code Generation. However you should recieve an early warning about the ...

약 2달 전 | 0

답변 있음
HDL Coder Example for ZedBoard
Can you review this shipping example? It should be customizable for your usecase. Generate IP Core from MATLAB for Blinking LED...

약 2달 전 | 0

| 수락됨

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How to create a custom fpga board to use with IP core generation
An example of an FPGA board which does not contain a processor can be found here: Working with an FPGA Board Using IP Core Gen...

약 2달 전 | 0

| 수락됨

답변 있음
why the subtraction gives the wrong ans.?
Integers in MATLAB have Saturation behaviors. To avoid saturation behavior of Integers when using MATLAB Code, you may need to ...

약 2달 전 | 0

답변 있음
What exactly do coder config InputPipeline and OutputPipeline do?
In MATLAB to HDL workflow InputPipeline and OutputPipeline options insert pipelines on the whole function. You can also control...

약 2달 전 | 1

| 수락됨

답변 있음
Problem facing in matlab code to vhdl code convertion
https://www.mathworks.com/help/hdlcoder/matlab-algorithm-design.html Please check out this page for best practices in writing M...

약 2달 전 | 0

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