Learn how to implement and verify a high-speed signal processing algorithm using HDL Coder and HDL Verifier.
High-speed signal processing is a requirement for application such as radar, broadband wireless and backhaul. This webinar illustrates the workflow for designing a 1.6 giga-samples per second (GSPS) fast Fourier transform (FFT) algorithm and implementing it on an FPGA.
The demonstration will include:
Recorded: 23 Jun 2015
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