Applications

Implement radar and wireless communication applications

Use DSP HDL Toolbox™ blocks to implement complex applications such as satellite communication, radio detection and ranging (RADAR), and wireless communication.

Topics

Wireless Communication

Implement Digital Upconverter for FPGA
Design a digital upconverter (DUC) for LTE on FPGAs.
Implement Digital Downconverter for FPGA
Design a digital downconverter (DDC) for LTE on FPGAs.
WLAN HDL Time and Frequency Synchronization (Wireless HDL Toolbox)
Implement WLAN time- and frequency-synchronization algorithm that is optimized for hardware.
Sample Rate Conversion for an LTE Receiver (Wireless HDL Toolbox)
Implement a sample rate converter for an LTE receiver front end.

Radar

FPGA-Based Beamforming in Simulink: Algorithm Design
Develop a beamforming algorithm suitable for implementation on hardware (Part 1).
FPGA-Based Beamforming in Simulink: Code Generation
Generate HDL code for a beamforming algorithm (Part 2).
FPGA-Based Monopulse Technique: Algorithm Design
Develop a monopulse technique to perform digital downconversion on hardware (Part 1).
FPGA-Based Monopulse Technique: Code Generation
Generate HDL code for a monopulse digital downconverter (Part 2).
FPGA-Based Range-Doppler Processing - Algorithm Design and HDL Code Generation
Develop a range-Doppler response suitable for implementation on hardware.
Pulse-Doppler Radar Using Xilinx RFSoC Device (SoC Blockset Support Package for Xilinx Devices)
This example shows how to build, simulate, and deploy a pulse-Doppler radar system in Simulink® using an SoC Blockset™ implementation targeted on the Xilinx® Zynq® UltraScale+™ RFSoC evaluation kit.
FPGA-Based Cell-Averaging Constant False Alarm Rate (CA-CFAR) Detector
Design a FPGA implementation-ready CA-CFAR detector.
FPGA-Based Minimum-Variance Distortionless-Response (MVDR) Beamformer
Implement a fixed-point HDL-optimized minimum-variance distortionless-response beamformer.