dsp.DCBlocker

Block DC component (offset) from input signal

Description

The dsp.DCBlocker System object™ removes the DC offset from each channel (column) of the input signal. The operation runs over time to continually estimate and remove the DC offset.

To block the DC component of the input signal:

1. Create the dsp.DCBlocker object and set its properties.

2. Call the object with arguments, as if it were a function.

To learn more about how System objects work, see What Are System Objects? (MATLAB).

Creation

Syntax

dcblker = dsp.DCBlocker

dcblker = dsp.DCBlocker(Name,Value)

Description

dcblker = dsp.DCBlocker creates a DC blocker System object, dcblker, to block the DC component from each channel (column) of the input signal.

dcblker = dsp.DCBlocker(Name,Value) creates a DC blocker System object, dcblker, with each specified property set to the specified value. Enclose each property name in single quotes.

Example: dcblker = dsp.DCBlocker('Algorithm','FIR')

Properties

Unless otherwise indicated, properties are nontunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them.

If a property is tunable, you can change its value at any time.

For more information on changing property values, see System Design in MATLAB Using System Objects (MATLAB).

Algorithm — Algorithm for estimating DC offset

'IIR' (default) | 'FIR' | 'CIC' | 'Subtract mean'

Algorithm for estimating DC offset, specified as one of the following:

• 'IIR' –– The object uses a recursive estimate based on a narrow, lowpass elliptic filter. The Order property sets the order of the filter, and the NormalizedBandwidth property sets its bandwidth. This algorithm typically uses less memory than the FIR algorithm and is more efficient.

• 'FIR' –– The object uses a nonrecursive, moving average estimate based on a finite number of past input samples. The Length property sets the number of samples. The FIR filter has a linear phase response and does not cause any phase distortion to the signal. The IIR filter requires less memory and is more efficient to implement.

• 'CIC' –– The object uses a CIC decimator, with a decimation factor of 1, whose differential delay is calculated using the NormalizedBandwidth property. It uses two sections to ensure that the first sidelobe attenuation is at least 25 dB below the main lobe of the filter. This algorithm requires fixed-point inputs and can be used for HDL code generation. For more details, see HDL Code Generation.

• 'Subtract mean' –– The object computes the means of the columns of the input matrix, and subtracts the means from the input. This method does not retain state between inputs.

You can visualize the IIR, FIR, and CIC responses by using the fvtool function.

NormalizedBandwidth — Normalized bandwidth of lowpass IIR or CIC filter

0.001 (default) | real scalar greater than 0 and less than 1

Normalized bandwidth of the IIR or CIC filter, specified as a real scalar greater than 0 or less than 1. The normalized bandwidth is used to estimate the DC component of the input signal.

Dependencies

This property applies only when you set the Algorithm property to 'IIR' or 'CIC'.

Order — Order of lowpass IIR elliptic filter

6 (default) | integer greater than 3

Order of the lowpass IIR elliptic filter that is used to estimate the DC level, specified as an integer greater than 3.

Dependencies

This property applies only when you set the Algorithm property to 'IIR'.

Length — Number of past input samples used in FIR algorithm

50 (default) | positive integer

Number of past input samples used in the FIR algorithm to estimate the running mean, specified as a positive integer.

Dependencies

This property applies only when you set the Algorithm property to 'FIR'.

Usage

For versions earlier than R2016b, use the step function to run the System object algorithm. The arguments to step are the object you created, followed by the arguments shown in this section.

For example, y = step(obj,x) and y = obj(x) perform equivalent operations.

Syntax

dcblkerOut = dcblker(input)

Description

dcblkerOut = dcblker(input) removes the DC component from each channel (column) of the input and returns the output.

Input Arguments

input — Input signal

vector | matrix | N-D array

Data input to the DC blocker object, specified as a vector, matrix, or N-D array.

Example: t = (0:0.001:100)'; x = sin(30*pi*t) + 1;

Data Types: single | double | int8 | int16 | int32 | fi
Complex Number Support: Yes

Output Arguments

dcblkerOut — Signal with DC component removed

vector | matrix | N-D array

Signal with DC component removed, returned as a vector, matrix, or N-D array.The output dimensions match the input dimensions.

Data Types: single | double | int8 | int16 | int32 | fi
Complex Number Support: Yes

Object Functions

To use an object function, specify the System object as the first input argument. For example, to release system resources of a System object named obj, use this syntax:

release(obj)

Visualization Specific to DSP System Toolbox

fvtool

Visualize frequency response of DSP filters

Common to All System Objects

step	Run System object algorithm
release	Release resources and allow changes to System object property values and input characteristics
reset	Reset internal states of System object

Examples

Remove DC Component and Display Results

Note: If you are using R2016a or earlier, replace each call to the object with the equivalent step syntax. For example, obj(x) becomes step(obj,x).

Remove the DC component of an input signal using the IIR, FIR, and subtract mean estimation algorithms.

Create a signal composed of a 15 Hz tone, a 25 Hz tone, and a DC offset.

t = (0:0.001:100)';
x = sin(30*pi*t) + 0.33*cos(50*pi*t) + 1;

Create three DC blocker objects for the three estimation algorithms.

dc1 = dsp.DCBlocker('Algorithm','IIR','Order', 6);
dc2 = dsp.DCBlocker('Algorithm','FIR','Length', 100);
dc3 = dsp.DCBlocker('Algorithm','Subtract mean');

For each second of time, pass the input signal through the DC blockers. By implementing the DC blockers in 1-second increments, you can observe differences in the convergence times.

for idx = 1 : 100
    range = (1:1000) + 1000*(idx-1);
    y1 = dc1(x(range));          % IIR estimate
    y2 = dc2(x(range));          % FIR estimate
    y3 = dc3(x(range));          % Subtract mean
end

Plot the input and output data for the three DC blockers for the first second of time, and show the mean value for each signal. The mean values for the three algorithm types show that the FIR and Subtract mean algorithms converge more quickly.

plot(t(1:1000),x(1:1000), ...
    t(1:1000),y1, ...
    t(1:1000),y2, ...
    t(1:1000),y3);
xlabel('Time (sec)')
ylabel('Amplitude')
legend(sprintf('Input DC:%.3f',mean(x)), ...
    sprintf('IIR DC:%.3f',mean(y1)), ...
    sprintf('FIR DC:%.3f',mean(y2)), ...
    sprintf('Subtract mean DC:%.3f',mean(y3)));

Frequency Response Before and After DC Blocker

Note: If you are using R2016a or earlier, replace each call to the object with the equivalent step syntax. For example, obj(x) becomes step(obj,x).

Compare the spectrum of an input signal with a DC offset to the spectrum of the same signal after applying a DC blocker. Enable the DC blocker to use the FIR estimation algorithm.

Create an input signal composed of three tones and that has a DC offset of 1. Set the sampling frequency to 1 kHz and set the signal duration to 100 seconds.

fs = 1000;
t = (0:1/fs:100)';
x = sin(30*pi*t) + 0.67*sin(40*pi*t) + 0.33*sin(50*pi*t) + 1;

Create a DC blocker object that uses the FIR algorithm to estimate the DC offset.

dcblker = dsp.DCBlocker('Algorithm','FIR','Length',100);

Create a spectrum analyzer with power units set to dBW and a frequency range of [-30 30] to display the frequency response of the input signal. Using the clone function, create a second spectrum analyzer to display the response of the output. Then, use the Title property of the spectrum analyzers to label them.

hsa = dsp.SpectrumAnalyzer('SampleRate',fs, ...
    'PowerUnits','dBW','FrequencySpan','Start and stop frequencies',...
    'StartFrequency',-30,'StopFrequency',30,'YLimits',[-200 20],...
    'Title','Signal Spectrum');

hsb = clone(hsa);
hsb.Title = 'Signal Spectrum After DC Blocker';

Pass the input signal, x, through the DC blocker to generate the output signal, y.

y = dcblker(x);

Use the first spectrum analyzer to display the frequency characteristics of the input signal. The tones at 15, 20, and 25 Hz, and the DC component, are clearly visible.

hsa(x)

Use the second spectrum analyzer to display the frequency characteristics of the output signal. The DC component has been removed.

hsb(y)

Remove DC Offset from Fixed-Point Data

Note: If you are using R2016a or earlier, replace each call to the object with the equivalent step syntax. For example, obj(x) becomes step(obj,x).

Remove a DC offset from a fixed-point signal by using a DC blocker. The DC blocker uses the CIC lowpass filtering method to estimate the DC offset.

Generate random binary data.

data = randi([0 1],1.2e5,1);

Create a 64-QAM modulator System object and modulate the data by running its algorithm.

mod = comm.RectangularQAMModulator('ModulationOrder',64, ...
                                    'BitInput',true);
modOut = mod(data);

Determine the constellation reference points for the modulator.

cRefPts = constellation(mod);

Add AWGN to the modulated signal by using the appropriate System object and running its algorithm.

noise = comm.AWGNChannel('EbNo', 14.75, ...
                          'BitsPerSymbol', 6, ...
                          'SignalPower', 42, ...
                          'SamplesPerSymbol', 1);
noisyOut = noise(modOut);

Display the scatter plot of the noisy signal by using a constellation diagram object. The red plus markers show the ideal symbol locations.

constDiag = comm.ConstellationDiagram('Name','Noisy Constellation',...
    'ReferenceConstellation',cRefPts, ...
    'XLimits',[-8 8],'YLimits',[-8 8]);
constDiag(noisyOut)

Add a DC offset of 1 to the modulated signal.

noisyOut = noisyOut + 1;

Display the spectrum of the signal. The spike at 0 kHz is due to the introduced offset.

specAna = dsp.SpectrumAnalyzer(...
  'YLimits',[-40,40], ...
  'Title','Noisy Spectrum with DC Offset');
specAna(noisyOut);

View the effect of the DC offset on the constellation. The constellation has shifted one unit to the right.

constDiag(noisyOut)
constDiag.Name = 'Noisy Constellation with DC Offset';

Convert the noisy signal to a signed, fixed-point object that has a 16-bit word length and an 11-bit fraction length.

noisyOut = fi(noisyOut,1,16,11);

Remove the offset by creating a DC blocker object. The object uses the CIC algorithm to estimate the DC offset.

dcblker = dsp.DCBlocker('Algorithm','CIC');

Visualize the frequency response of the CIC estimating filter.

fvtool(dcblker)

Pass the offset, noisy signal through the DC blocker and convert its output to a double.

dcBlockerOutFxP = dcblker(noisyOut);
dcBlockerOut = double(dcBlockerOutFxP);

Plot the signal spectrum to show the effect of removing the DC offset. The spike at 0 kHz has been removed.

specAna(dcBlockerOut);
specAna.Title = 'Noisy Spectrum with DC Removed';

Plot the constellation and verify that the signal shifted back to the left.

constDiag(dcBlockerOut)
constDiag.Name = 'Noisy Constellation with DC Removed';

To see the effects of removing a DC offset, vary the value of the NormalizedBandwidth property in the DC blocker object.

Algorithms

The DC blocker subtracts the DC component from the input signal. You can estimate the DC component by using the IIR, FIR, CIC, or subtract mean algorithm.

IIR

Pass the input signal through an IIR lowpass elliptical filter.

The elliptical IIR filter has a passband ripple of 0.1 dB and a stopband attenuation of 60 dB. You specify the normalized bandwidth and the filter order.

FIR

Pass the input signal through an FIR filter that uses a nonrecursive moving average from a finite number of past input samples.

The FIR filter coefficients are given as ones(1,Length)/Length, where you specify the Length. The FIR filter structure is a direct form I transposed structure.

CIC

Pass the input signal through a CIC filter. Because the CIC filter amplifies the signal, the filter gain is estimated and subtracted from the DC estimate.

The Cascaded Integrator-Comb (CIC) filter consists of two integrator-comb pairs. These pairs help to ensure that the peak of the first sidelobe of the filter response is attenuated by at least 25 dB relative to the peak of the main lobe. The normalized 3-dB bandwidth is used to calculate the differential delay. The delay is used to determine the gain of the CIC filter. The inverse of the filter gain is used as a multiplier, which is applied to the output of the CIC filter. This ensures that the aggregate gain of the DC estimate is 0 dB.

The following equation characterizes the aggregate magnitude response of the filter and the multiplier:

$$\left|H(e^{j\omega })\right|={\left|\frac{\sin (M\frac{\pi }{2}{B}_{norm})}{M\sin (\frac{\pi }{2}{B}_{norm})}\right|}^N$$

• B_norm is the normalized bandwidth such that 0 < B_norm < 1.

• M is the differential delay in samples.

• N is the number of sections, equal to 2.

Set the differential delay, M, to the smallest integer such that |H(e^jω)| < 1/√2. Once M is known, the gain of the CIC filter is calculated as M^N. Therefore, to precisely compensate for the filter gain, the multiplier is set to (1/M)^N.

Subtract Mean

Compute the mean value of each column of the input signal and subtract the mean from the input. For example, if the input is [1 2 3 4; 3 4 5 6], then a DC Blocker set to this mode outputs [-1 -1 -1 -1; 1 1 1 1].

References

[1] Nezami, M. “Performance Assessment of Baseband Algorithms for Direct Conversion Tactical Software Defined Receivers: I/Q Imbalance Correction, Image Rejection, DC Removal, and Channelization.” MILCOM, 2002.

Extended Capabilities

C/C++ Code Generation

Generate C and C++ code using MATLAB® Coder™.

Usage notes and limitations:

See System Objects in MATLAB Code Generation (MATLAB Coder).

HDL Code Generation

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

This object supports HDL code generation if you have HDL Coder™ installed. HDL Coder provides additional configuration options that affect HDL implementation and synthesized logic.