Can anyone explain the relationship between simulink sampling time and real world clock in FPGA?
조회 수: 5 (최근 30일)
이전 댓글 표시
Hello.
Can anyone explain the relationship between simulink sampling time and real world clock in FPGA? I'm working with FPGA Cyclone IV, Matlab 2014b.
댓글 수: 0
답변 (1개)
Ganesh Gaonkar
2015년 6월 12일
Hi,
This example from MathWork's HDL Verifier Toolbox can give you a good idea on the relation between Simulink Sample Time and FPGA clock ticks.
댓글 수: 1
Yeung Pok Nga
2024년 6월 17일
This page doesn't exist anymore, could you please provide a different link? Thank you
참고 항목
카테고리
Help Center 및 File Exchange에서 Sources에 대해 자세히 알아보기
Community Treasure Hunt
Find the treasures in MATLAB Central and discover how the community can help you!
Start Hunting!