phase offset two (lead_lag) epwm using c2000 F28379D

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mouadh
mouadh 2025년 6월 14일
댓글: mouadh 2025년 6월 19일
Hi , I want to make two PWM module signals that are leading and algging every two periode, as described in the attached phots, so the first signal is leading in the first periode but lagging in the second periode.
the result on the real scope is not accurate ? how to genrate them using high frequncy epwm blocks.
best regards
  댓글 수: 6
Umeshraja
Umeshraja 2025년 6월 19일
Hi @mouadh, One approach you might consider is to generate odd-period and even-period signals separately. The odd-period signals can have a time period of 2T with a negative phase shift, while the even-period signals can use a positive phase shift. You can then combine these independently generated signals to form the final result.
mouadh
mouadh 2025년 6월 19일
Hi@Umeshraja , would you please draw the carriers and the sin for me, iam bit lost here.
thnaks in advance

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