How to modify the input ports of the CCSDS LDPC decoder and reduce its BRAM resource consumption
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The official website states that this block supports scalar inputs and vector inputs of size 8, but in the Simulink example, I noticed that the input port is ufix4, and I couldn’t find any configuration options. How should I modify this? Additionally, I want to reduce BRAM resource consumption. Are there any parameters related to parallelism that can be configured?
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도움말 센터 및 File Exchange에서 HDL-Optimized System Design에 대해 자세히 알아보기
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