# Schmitt Trigger

Behavioral model of Schmitt trigger

**Libraries:**

Simscape /
Electrical /
Integrated Circuits /
Logic

## Description

The Schmitt Trigger block implements a behavioral model of Schmitt trigger.

The block output logic level is `HIGH`

when the input rises above the
**High level input voltage**
(*V*_{IH}) value and does not go
`LOW`

until the input falls below the lower-valued **Low
level input voltage** (*V*_{IL})
value. This logic implements a hysteresis characteristic between input and
output.

In the graphic, *V*_{OH} and
*V*_{OL} correspond to the **High
level output voltage** and **Low level output
voltage** values, respectively.

The next figure shows a sample output of the block with parameters
*V*_{IH} = 2V,
*V*_{IL} = -2V,
*V*_{OH} = 3V, and
*V*_{OL} = -3V.

The block determines the logic levels of the gate inputs as follows:

If the gate voltage is greater than the threshold voltage, the block interprets the input as logic 1.

Otherwise, the block interprets the input as logic 0.

The *threshold voltage* is the voltage value at midpoint between
the **High level input voltage** parameter value and the **Low
level input voltage** parameter value.

**Note**

To improve simulation speed, the block does not model all the internal individual MOSFET devices that make up the gate. See Assumptions and Limitations for details.

The block models the gate as follows:

The gate inputs have infinite resistance and finite or zero capacitance.

The gate output offers a selection of two models:

`Linear`

and`Quadratic`

. For more information, see Selecting the Output Model for Logic Blocks. Use the**Output current-voltage relationship**parameter to specify the output model.You can specify propagation delay for both output models. For

`Linear`

output, the block sets the value of the gate output capacitor such that the resistor-capacitor time constant equals the**Propagation delay**parameter value. For`Quadratic`

output, the gate input demand is lagged to approximate the**Propagation delay**parameter value.

The block output voltage depends on the output model selected:

For

`Linear`

model, output high is the**High level output voltage**parameter value, and output low is the**Low level output voltage**parameter value.For

`Quadratic`

model, the output voltage for High and Low states is a function of the output current, as explained in Quadratic Model Output and Parameters. For zero load current, output high is Vcc (the**Supply voltage**parameter value), and output low is zero volts.

## Assumptions and Limitations

The block does not model the internal individual MOSFET devices that make up the gate
(except for the final MOSFET pair if you select the `Quadratic`

option for the **Output current-voltage relationship** parameter). This
limitation has the following implications:

The block does not accurately model the gate's response to input noise and inputs that are around the logic threshold voltage.

The block does not accurately model dynamic response.

For circuits that involve a feedback path around a set of logic gates, you might need to set a nonzero propagation delay on one or more gates.

This block is implemented using event equations. This means that you must provide an
initial output state that is consistent with the block input at time zero. For example,
if you set initial output state HIGH, but the initial input voltage is below the
**Low level input voltage**, then the initial output stays HIGH,
the state only correcting itself when the input voltage rises above the **High
level input voltage** value.

## Ports

### Conserving

## Parameters

## Extended Capabilities

## Version History

**Introduced in R2015a**