Simulation and Analysis
This set of steps runs the
soc_hwsw_top.slx model created in the
previous steps. A visual of the processor output data shows the complete SoC
In the project folder, open the model
Using a Scope block and Rate Transition block, update the
model as shown in this diagram.
Run the model and open the
The display in the
Vector Scope shows the counter output.
Stream from FPGA to Processor Template | Use Template to Create SoC Model