Selector

Select input elements from vector, matrix, or multidimensional signal

• Library:

• Simulink / Signal Routing

  HDL Coder / Signal Routing

• 

Description

The Selector block generates as output selected or reordered elements of an input vector, matrix, or multidimensional signal.

Based on the value you enter for the Number of input dimensions parameter, a table of indexing settings is displayed. Each row of the table corresponds to one of the input dimensions in Number of input dimensions. For each dimension, you define the elements of the signal to work with. Specify a vector signal as a 1-D signal and a matrix signal as a 2-D signal. When you configure the Selector block for multidimensional signal operations, the block icon changes.

For example, assume a 6-D signal with a one-based index mode. The table of the Selector block dialog changes to include one row for each dimension. If you define dimensions as shown in the next table, the output is Y = U(1:end,2:6,[1 3 5],Idx4:Idx4+7,Idx5,Idx6(1):Idx6(2)), where Idx4, Idx5, and Idx6 are the index ports for dimensions 4, 5, and 6.

Row	Index Option	Index	Output Size
1	Select all
2	Starting index (dialog)	2	5
3	Index vector (dialog)	[1 3 5]
4	Starting index (port)		8
5	Index vector (port)
6	Starting and ending indices (port)

You can use an array of buses as an input signal to a Selector block. For details about defining and using an array of buses, see Combine Buses into an Array of Buses.

Ports

Input

Port_1 — Input signal

scalar | vector | matrix | multidimensional

Input signal and source of elements to output signal.

Data Types: single | double | half | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated | bus

IndxN — Nth index signal

scalar | vector | matrix

External port specifying an index for the selection of the corresponding output element.

Dependencies

To enable an external index port, in the corresponding row of the Index Option table, set Index Option to Index vector (port), Starting index (port), or Starting and ending indices (port).

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32 | enumerated

Output

Port_1 — Output signal

scalar | vector | matrix | multidimensional

Output signal generated from selected or reordered elements of input signal.

Data Types: single | double | half | int8 | int16 | int32 | int64 | uint8 | uint16 | uint32 | uint64 | Boolean | fixed point | enumerated | bus

Parameters

Number of input dimensions — Number of dimensions of the input signal

1 (default) | integer

Specifies the number of dimensions of the input signal.

Programmatic Use

Block Parameter: NumberOfDimensions

Type: character vector

Values: integer

Default: '1'

Index mode — Index mode

One-based (default) | Zero-based

Specifies the indexing mode. If One-based is selected, an index of 1 specifies the first element of the input vector. If Zero-based is selected, an index of 0 specifies the first element of the input vector.

Programmatic Use

Block Parameter: IndexMode

Type: character vector

Values: 'One-based' | 'Zero-based'

Default: 'One-based'

Index Option — Index method for elements

Index vector (dialog) (default) | Select all | Index vector (port) | Starting index (dialog) | Starting index (port) | Starting and ending indices (port)

Defines, by dimension, how the elements of the signal are to be indexed. From the list, select:

• Select all

  No further configuration is required. All elements are selected.

• Index vector (dialog)

  Enables the Index column. Enter the vector of indices of the elements. Do not select this option when the input signal is variable-sized.

• Index vector (port)

  No further configuration is required.

• Starting index (dialog)

  Enables the Index and Output Size columns. Enter the starting index of the range of elements to select in the Index column and the number of elements to select in the Output Size column. Do not select this option when the input signal is variable-sized.

• Starting index (port)

  Enables the Output Size column. Enter the number of elements to be selected in the Output Size column.

• Starting and ending indices (port)

  No further configuration is required.

  Using this option results in a variable-size output signal. When you update, the output dimension is set to be the same as the input signal dimension. During execution, the output dimension is updated based on the signal feeding the index.

  When logging output signal data, signals not selected are padded with NaN values.

The Index and Output Size columns appear as needed.

Programmatic Use

Block Parameter: IndexOptionArray

Type: character vector

Values: 'Select all' | 'Index vector (dialog)' | 'Index option (port)' | 'Starting index (dialog)' | 'Starting index (port)' | Starting and ending indices (port)

Default: 'Index vector (dialog)'

Index — Index of elements

1 (default) | integer

If the Index Option is Index vector (dialog), enter the index of each element you are interested in.

If the Index Option is Starting index (dialog), enter the starting index of the range of elements to be selected.

Programmatic Use

Block Parameter: IndexParamArray

Type: character vector

Values: cell array

Default: '{ }'

Output Size — Width of the block output signal

1 (default) | integer

Specifies the width of the block output signal.

Programmatic Use

Block Parameter: OutputSizeArray

Type: character vector

Values: cell array

Default: '{ }'

Input port size — Width of the input signal

3 (default) | integer

Specify the width of the block input signal for 1-D signals. Enter -1 to inherit from the driving block.

Programmatic Use

Block Parameter: InputPortWidth

Type: character vector

Values: integer

Default: '1'

Sample time — Specify sample time as a value other than -1

-1 (default) | scalar | vector

Specify the sample time as a value other than -1. For more information, see Specify Sample Time.

Dependencies

This parameter is not visible unless it is explicitly set to a value other than -1. To learn more, see Blocks for Which Sample Time Is Not Recommended.

Programmatic Use

Block Parameter: SampleTime

Type: character vector

Values: scalar or vector

Default: '-1'

Model Examples

Index Options with the Selector Block

Two Selector blocks with the same kind of input signals, but two different Index Option settings.

Open Model

Variable-Size Signal Basic Operations

How variable-size signals can be generated and also illustrates some of the operations that can be applied to them. The purpose of this example is to introduce you to the basic operations associated with variable-size signals.

Open Model

Multimode Variable-Size Signal

How to use different operation modes to correspond to different signal sizes

Open Model

Modeling Arrays of Buses

Use arrays of buses to represent structured data compactly.

Open Model

Block Characteristics

Data Types	Boolean | double | enumerated | fixed point | half | integer | single
Direct Feedthrough	no
Multidimensional Signals	yes
Variable-Size Signals	yes
Zero-Crossing Detection	no

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

HDL Code Generation

Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.

HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.

HDL Architecture

This block has a single, default HDL architecture.

HDL Block Properties

General
ConstrainedOutputPipeline	Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. For more details, see ConstrainedOutputPipeline (HDL Coder).
InputPipeline	Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. For more details, see InputPipeline (HDL Coder).
OutputPipeline	Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. For more details, see OutputPipeline (HDL Coder).

Native Floating Point
LatencyStrategy	Specify whether to map the blocks in your design to inherit, Max, Min, or Zero for the floating-point operator. The default is inherit. See also LatencyStrategy (HDL Coder).

Complex Data Support

This block supports code generation for complex signals.

PLC Code Generation
Generate Structured Text code using Simulink® PLC Coder™.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.