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DPI Generation for Simulink Subsystem

Generate SystemVerilog DPI component from Simulink® subsystem

You can use a DPI component generated from a Simulink subsystem in two ways :

  • Export SystemVerilog DPI Component — You can integrate this component into your HDL simulation as a behavioral model. The component generator supports test points and tunable parameters. You can also generate a SystemVerilog test bench that verifies the generated DPI component against data vectors from your subsystem. See Generate SystemVerilog DPI Component.

  • Generate SystemVerilog DPI Test Bench (with HDL Coder™) — Use this test bench to verify your generated HDL code using C code generated from your entire Simulink model, including the DUT and data sources. See Verify HDL Design Using SystemVerilog DPI Test Bench (HDL Coder).

See DPI Component Generation with Simulink.

To use this functionality, download and install the ASIC Testbench for HDL Verifier add-on. This feature also requires Simulink Coder™.


HDL VerifierGenerate HDL verification artifacts and follow verification workflows from a Simulink subsystem (Since R2020b)


AssertionGenerate SystemVerilog assertions from Simulink assertion


Generate and Verify a DPI Component

Advanced DPI Options

Verify Generated HDL Code with SystemVerilog DPI Test Bench (requires HDL Coder license)