Feeds
질문
Seeking Guidance on Auto-Generating Verilog Code for ASIC Simulation with HDL Coder and Deep Learning HDL Toolbox
I am currently working on an ASIC design project and have both HDL Coder and the Deep Learning HDL Toolbox installed. I need to ...
대략 1년 전 | 답변 수: 2 | 0
2
답변질문
Graphics Incompatibilities in Control System Toolbox between R2024a and R2024b
A1 = 1; wp1 = 10; A2 = -2; wp2 = 20; s = tf('s'); H1 = A1 / (1 + s/wp1); H2 = A2 / (1 + s/wp2); H = H1 + H2; figure; ...
1년 초과 전 | 답변 수: 3 | 0
3
답변질문
The combine(S) and horner(p) functions did not work as expected?
Code: clear i syms C_F C_L C_GS g_m R_L omega positive s = i*omega; Y_in=(1-(s*C_F-g_m)/(1/R_L+s*C_F+s*C_L))*s*C_F+s*C_GS ...
1년 초과 전 | 답변 수: 0 | 0
