How to generate Verilog code from Deep Learning Network in MATLAB?
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I have trained a Deep Learning Network in MATLAb, now I have to genearte a Verilog code for the same. I went through Deep Learning HDL Toolbox, there I found the methods to deploy the network on FPGA but did not get any method to generate a Verilog code. Please help.
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Giusy Giulia Tuccari
2022년 3월 18일
Did you find any solution?
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카테고리
도움말 센터 및 File Exchange에서 Deep Learning HDL Toolbox에 대해 자세히 알아보기
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