thanks for helping
Errors : algebraic loop in use HDL simulink coder
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Pham Van Dung 2013년 6월 2일
답변: Kiran Kintali 2023년 3월 28일
Dear friends, when i convert one Simulink block to Verilog use HDL Simulink coder, i have this problem: *_ Failed Cannot connect to model; please try Update Diagram (Ctrl-D).
Block diagram 'untitled' contains an algebraic loop. The algebraic loop solver is disabled because of the current setting for Algebraic loop option in the Diagnostics page of the Configuration Parameters Dialog_*
Can you give me some suggestions to solve this problem? Thanks so much!
Pham Van Dung
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Tim McBrayer 2013년 6월 3일
The error message states you have an algebraic loop in your design. Basically, an algebraic loop is a path in your Simulink model that makes a loop, and has no delays in it. HDL Coder does not support code generated for designs with algebraic loops, as this will in general result in hardware that is unstable.
For more information about algebraic loops, see http://www.mathworks.com/support/solutions/en/data/1-16V6S/.
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Kiran Kintali 2023년 3월 28일
Models with algebraic loops are not supported for HDL Code generation.
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