Why are Internal Interfaces required to be assigned but not External Interfaces in HDL Workflow Advisor?

조회 수: 2 (최근 30일)
I am trying to create my own ReferenceDesign for HDL Workflow Advisor.
In the Board-Plugin I can define External I/O Interfaces with the addExternalIOInterface function.
And in the ReferenceDesign Definition-File I can add Internal I/O Interfaces with the addInternalIOInterface function.
Then in the HDL Workflow Advisor, when I do not connect an Internal Interface then I am getting an Error: "Failed Interface [...] is required to be assigned, please assign this interface to one of the ports in the Target Interface Table.
However I do not connect an External Interface, then I am just getting: Warning Interface is not assigned to model port [...].
Why can´t I just leave an Interface unconnected?
Thanks in advance.

답변 (1개)

Aman Vyas
Aman Vyas 2020년 11월 2일
You can open Xilinx ISE project from the link generated in HDL Workflow Advisor step 4.1, and change following two settings in the ISE project. Then ISE will not attempt to bind the I/Os to IOBs.
  1. Clear “add I/O buffer” (–iobuf) in synthesis settings
  2. Clear “trim unconnected signals” (–u) in mapping settings
Alternatively, you can create a Tcl file with following two lines to set the same settings, and attach the Tcl file in the "Additional source files" box in HDL Workflow Advisor step 4.1.
project set "Trim Unconnected Signals" "false" -process "Map"
project set "Add I/O Buffers" "false" -process "Synthesize - XST"
You can take look at this link :
Hope this helps !
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Niklas Weis
Niklas Weis 2020년 11월 5일
I´m sorry but the Error mentioned above appears at point 1.3 "Set Target Interface" of the HDL Workflow Advisor which means I have no chance to advance to point 4.1
Isn´t there a way to just give me a warning instead of an Error when I have unconnected internalIOInterfaces?
Kind Regards

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