Required Linux image / utilitys for IntelSoC custom boards

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Dominique Görner
Dominique Görner 2020년 1월 13일
댓글: JT Ferrara 2021년 2월 11일
Im trying to get the HDL Coder/Embedded Coder Co-Demo "hdlcoder_led_blinking" working with a custom board: DE0-nano-SoC/Atlas SoC.
I added the custom board to Matlab including the Qsys file and I can run the FPGA side, when flashing over JTAG.
On the HPS side I have linux working both with the linux image that came in the box and one i found on the terasic website.
I have COM and SSH connections of the HPS working.
The problems I have are
  1. I can't Flash the FPGA over the HPS. It says it's missing the mw_setboot script.
  2. When flashing the FPGA over JTAG and the HPS over COM/Ethernet the AXI Interface doesnt work.
Both Problems seem to be Linux related,since the HDL side works fine when flashing via JTAG. The "Define Custom Board and Reference Design for Intel SoC Workflow" Guide uses a image provided by terasic for the DE1 board as well, which leads me to believe the Image provided by the embedded coder installation isnt strictly necessary. But since 1.) is missing something, im still wondering if there is a embedded coder linux version which I can build for my device?
(I tried the embedded Coder linux image of one of the demo boards as well, but because they use a different chip it doesnt even boot.)
Im currently using Matlab 2018b
Any help is greatly appreciated.

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JT Ferrara
JT Ferrara 2020년 1월 23일
Hi Dominique,
The default programming method over the HPS assumes you are using the Mathworks Embedded Coder Linux image. Since there is no Linux image provided for your specific device, and you are using your own Linux image, you will need to provicde your own script for programming the device.
You can integrate your custom programming script using the "CallbackCustomProgrammingMethod", as described here:
This callback function gets executed when you run the Program Target Device task in the HDL Workflow Advisor.
~ J.T.
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Dominique Görner
Dominique Görner 2021년 2월 9일
편집: Dominique Görner 2021년 2월 9일
New Question Below:
Yes this is correct i used the mathworks buildroot repo. Basically I created a folder for my Board here, and populated it with the necessary files. Like the Chip specific Preloader from the GHRD. Needed to tweak some RGMII Timings in the device Tree somewhere and had to apply a few patches after Buildroot threw some errors.
If you are curious about the fpga scripts used to flash in that linux instance: Take a look at the File System Overlay:
New Question:
Im having a problem with my Linux kernel. It is struggling to keep a consistent 1ms schedule with barely any CPU Load.
Linux is by default not very realtime friendly so I tried patching Preempt RT into the Mathworks provided Kernel. Sadly without much Success.
I feel lost configuring the Altera SOCFPGA PREEMPT RT Kernel instead of the Mathworks modified Kernel. Are there any Plans to provide a PreemptRT Kernel, or any hints on how to do this?
So far I identified changes to arch/arm/config arch/arm/boot and some added drivers. Anything else vital?
Is there any documentation on what changes are necessary to get the EmbeddedCoder/HDLCoder Co-Design Workflow running on a arbitrary linux kernel?
I am also curious why no RealTime Kernel was choosen in the first place, since using Simulink for Control Systems seems like the most likely use case.
Thank you very much. Any help is greatly appreciated
Dominique
JT Ferrara
JT Ferrara 2021년 2월 11일
Hi Dominique,
Unfortunately, we do not have documentation on how to manually adapt an arbitrary Linux kernel for use with MathWorks tools (i.e. the HDL Coder/Embedded Coder workflow). There is some automated support to adapt a Linux kernel for use with MathWorks tools from SoC Blockset, which you can see here:
However, I am not certain if this will support your use case with the PreemptRT Kernel.
If you have specific questions regarding this feature, I would recommend reaching out to MathWorks technical support directly:
~ J.T.

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