HDL Coder VHDL Output

조회 수: 3 (최근 30일)

Paul Sand 2019년 1월 18일

답변: Bharath Venkataraman 2019년 1월 21일

A quesiton on the std_logic_vector notation and outputs.

For the simple function of x = a+b I noticed the notation is ufix14_En15. Only 14 bits are being

input to the variable b. I interpret En15 as the fractional part is 15 bits. So what does that mean?

Bharath Venkataraman 2019년 1월 21일

fix14 implies that there are 14 bits in total. u implies unsigned.

En15 indicates that the LSB has a value of 2^-15, with an increment of 2 per bit going from bottom to top, so the MSB has a value of 2^-2.

Code Generation HDL Coder

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