Designing bus signals with same names but different buses

Hello all,

I have a simulink block with two buses which have a signal with the same name.

AB_c.x1, HJ_k.x1.

I would like to make the signals x1 and x1 as an input to the block. Does anybody know how this can be done?

Thanks in advance.

Cheers, Rashmi

[Abhi Sundararaman]

When you say you have a simulink block with two buses, do you mean you have two bus signals, from which you'd like to select the "x1" signals from each?

If so, you can do this by just using 2 "Bus selector" blocks, and selecting "x1" from each of the bus signals into the bus selector.

If the above does not reflect what you are trying to do, can you go into more detail on specifically where these bus signals are going, and which block you are inputting the two "x1" signals to?

[Rashmi Bharadwaja]

I used the Bus selector blocks like you suggested, but the name of the signal varies inside the subsystem. Could you tell me how to map this signal to its respective bus at the output?

[ES]

You can directly connect the selected signal to a subsystem. It has no harm. See above, signal x is connected to 'a'.

If you definitely need the names to match (for naming convention reasons etc) you can rename the signal by putting a passive block (like gain block above) and change the name.

Answer 1

[ES]

You should use bus selector to select the members you need and take it to subsystem with simple inports (non-bus).

Answer 2

[ES]

You can directly connect the selected signal to a subsystem. It has no harm. See above, signal x is connected to 'a'.

If you definitely need the names to match (for naming convention reasons etc) you can rename the signal by putting a passive block (like gain block above) and change the name.

[Rashmi Bharadwaja]

Could you tell me how I can map the signals at the output of the subsystems to the respective buses? Because the signal names seem to change at the input of the subsystem.