How to reset counter using its own output counter complete signal??

조회 수: 11 (최근 30일)
pranjali T
pranjali T 2017년 3월 16일
답변: Tejas 2024년 9월 24일
I have implemented counter logic in simulink with reset & counter complete signal. When I give reset externally logic functions very well. but my requirement is as soon as counter completes target time, it should get reset and starts counting again i.e. cyclic process. without requirement of external reset. So I took counter complete output & feed it back to reset. but it is giving algebric loop error. How to reset counter using its own output counter complete signal??. plz reply its urgent
  댓글 수: 2
John BG
John BG 2017년 3월 16일
Hi Pranjali
can you show the Simulink diagram attached to your question?
or a screen shot?
John BG
Alexander
Alexander 2023년 10월 15일
I have the same problem.
Is the issue that Rst of the counter is async?

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답변 (1개)

Tejas
Tejas 2024년 9월 24일
Hello Pranjali,
From the above question, I am assuming that you want to build a counter that automatically resets after reaching its upper limit.
Here are the steps to achieve this:
  • Add a Unit Delay block with an initial condition of 0. This block stores the current input at any given time and outputs the previous input. The output of this block will represent the current counter value. For more details on this block, refer to this documentation: https://www.mathworks.com/help/simulink/slref/unitdelay.html .
  • Include an Add block that takes inputs from the Unit Delay block and a Constant block with a value of 1.
  • Add a Compare To Constant block to receive input from the Add block and check if the count has reached its upper limit.
  • Use a Switch block that takes control input from the Compare To Constant block. This block forwards the output of the Add block if the condition is met, otherwise it sends a reset signal.
  • Connect the output of the Switch block to the Unit Delay block.
Below is a screenshot of the model:
Here is a screenshot of the expected output:

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