Coverting Matlab Code to VHDL Using HDL
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Hello There,
I'm converting Matlab Code (.m) to VHDL using the HDL Code. In my program, there are 30 variables. All of them are arrays [double (1x410)]
I had to convert all the variables to fixed-point numeric Ex: x= fi (x,true,8,4)
The problem is :
After I converted the Program to VHDL. I found the variables represented in 34 bits as showing below.
How could I present the variables in 8 or 16 bits maximum instead of 34 bits ?
Summary
-------------
Multipliers: 5330
Adders/Subtractors: 11070
Registers: 0
RAMs: 0
Multiplexers: 8200
----------------
Multipliers (5330)
---------------
16x16-bit Multipliers : 2050
real x real Multipliers : 1230
16x17-bit Multipliers : 410
18x16-bit Multipliers : 410
34x16-bit Multipliers : 410
50x16-bit Multipliers : 410
17x17-bit Multipliers : 410
Adders/Subtractors (11070)
----------------------
34x34-bit Adders : 410
16x1-bit Adders : 3690
32x1-bit Adders : 410
17x17-bit Adders : 820
64x64-bit Adders : 410
32x32-bit Adders : 2870
real Subtractors : 410
18-bit Subtractors : 410
18x18-bit Subtractors : 820
17x17-bit Subtractors : 410
19-bit Subtractors : 410
Multiplexers (8200)
33-bit 3-to-1 Multiplexer : 410
16-bit 3-to-1 Multiplexer : 4100
32-bit 2-to-1 Multiplexer : 1230
17-bit 3-to-1 Multiplexer : 1230
32-bit 3-to-1 Multiplexer : 410
41-bit 2-to-1 Multiplexer : 410
18-bit 3-to-1 Multiplexer : 410
Thanks,
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답변 (1개)
Walter Roberson
2016년 3월 7일
Fixed Point Designer should be able to analyze and make suggestions and adjustments.
댓글 수: 2
Walter Roberson
2016년 3월 9일
Sorry, I do not have that toolbox myself, so I am not familiar with any tricks or limitations.
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