How to Implement Configurable Sequence Reordering with N-Way Parallel Outputs Using HDL Coder?

조회 수: 3 (최근 30일)
## Problem Description
Dear community members,
I am seeking guidance on implementing a configurable sequence reordering system with parallel outputs using HDL Coder. Here are the detailed requirements:
### Requirements
1.**Input Sequence**:
Continuous data stream:
$$ x_1, x_2, \dots, x_L, x_{L+1}, \dots, x_{NL} $$
2.**Output Structure**:
-**N parallel outputs** with ​**L+1 elements per output**.
- Adjacent outputs overlap by ​**1 element**:
- *Output 1*: $ \{x_1, x_2, \dots, x_L, x_{L+1}\} $
- *Output 2*: $ \{x_{L+1}, x_{L+2}, \dots, x_{2L}, x_{2L+1}\} $
- ...
- *Output N*: $ \{x_{(N-1)L+1}, \dots, x_{NL}\} $
3.**Configurable Parameters**:
- $ L $: Overlap interval (output length = $ L + 1 $).
- $ N $: Number of parallel output channels.
Thank you in advance for your expertise.

답변 (1개)

Bharath Venkataraman
Bharath Venkataraman 2025년 6월 2일
편집: Bharath Venkataraman 2025년 6월 3일
The Tapped Delay block can give you the last L values (based on teh delay setting). You can add in additional logic to pick out the values at the times you need.
The hdl.TappedDelay System object provides the equivalent functionality in MATLAB.

카테고리

Help CenterFile Exchange에서 FPGA, ASIC, and SoC Development에 대해 자세히 알아보기

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by