Don't understand why I'm getting a 50% error rate

I thought this would be a simple problem but I'm missing something. Please reference the attached Simulink file (comm.slx). There aren't many examples using the CPFSK blocks (modulater/demodulator) and none that come from MathWorks. No matter which valid configuration I use for the CPFSK blocks they cause a 50% data loss.

Thanks

Answer 1

[Shashi Kiran]

Hi @Felipe,

I understand that you are using a CPFSK modulator and demodulator and facing issues with receiving a 50% Bit Error Rate (BER), which is the maximum possible BER.

After analyzing your model, I see that the "Traceback Depth" parameter is set to 16 in the "CPFSK Demodulator".

According to the documentation of the CPFSK modulator regarding the "Traceback depth":

"Traceback depth for the Viterbi algorithm, specified as a positive, integer scalar. The value of this property is also the value of the output delay. That value is the number of zero symbols that precede the first meaningful demodulated symbol in the output."

The "Traceback Depth" affects the output delay and should be the same as the "Receive Delay" in the "Error Rate calculation", as shown in the attached image.

For more details on "Traceback Depth", please refer to the following documentation: https://www.mathworks.com/help/comm/ref/comm.cpfskdemodulator-system-object.html#bsnan5f_2-TracebackDepth

I hope this helps.