How to check into simulink test sequence a local signal into the model
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I would like to check the state of the FSM into a stateflow chart without creating an output variable. And in a similar way some local variables.
I need to check it with verify statement into a test sequence block.
I tried using data store memory and simulink signal but i have problem with red/write consequentially action. I know i could remove that error from model configuration but i want to mantain to be compliant with my workflow.
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Pat Canny
2024년 4월 10일
Hi @Claudio Rosso - have you looked into Observers? https://www.mathworks.com/help/sltest/ug/access-model-data-wirelessly-by-using-observers.html
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