How can I generate IP core for xilinx spartan 6 fpga in matlab

조회 수: 5 (최근 30일)
naren
naren 2024년 3월 19일
답변: naren 2024년 3월 19일
I am getting errors oin ipcore generation workflow : Main error is i am unable to generate AXI-4 LITE interfaces for inputs

이 질문에 답변하려면 로그인하십시오.

답변 (1개)

naren
naren 2024년 3월 19일
The only workflow that worked for me was FPGA Turnkey.
Basically I took an led counter model and used the HDL Workflow advisor in FPGA Turnkey mode to implement it on my spartan 6 (xc6slx9) hardware .

카테고리

Help Center 및 File Exchange에서 Computer Vision Toolbox Supported Hardware에 대해 자세히 알아보기

태그

제품


릴리스

R2023b

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!

Translated by