Generate a PWM in FPGA using a customised carrier.
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Hi Kiran
Hope you doing well. I have seen your helpful answers for everyone. However , i have an issue and wish if you can help. I am trying to generate a PWM pulses using Speedgoat model IO334 FPGA. I have to customise an up-down counter ( as a carrier) to compare with a reference signal in order to obtain our PWM signals to drive a convertor. This counter must be HDL supported.
Keywords : Clock cycle of the speed goat is 10 nanos . Resulation can be 2^32-1.
I will appreciate if you can help
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Kiran Kintali
2023년 10월 27일
편집: Kiran Kintali
2023년 10월 27일
There are several pulse generator blocks in the Simulink library that are on the HDL Coder roadmap for automatic code generation. Please reach out to tech support with your requirements.
% Simulink / Discontinuities / PWM --> Generates gate pulses depending on the input duty cycle
% Simulink / Sources / Pulse Generator --> Generates square pulses at regular intervals
% Simscape / Electrical / Control / Pusle Width Modulation --> Generates pulses to control switching behavior for a three-phase, two-level power converter
In the mean time you may find useful the attached two PWM generator models using math blocks and counters that are fully HDL Coder compatible.
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Madhusudan
2024년 8월 21일
Hello kiran
i am using 2022b version i am also Stuck in PWM generation , So can i get above models that can support 2022b and HDL.
Thank you
-Madhusudan Reddy
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