How to initialize DDR External memory, such as InstructionData and WeightData unused dlhdl.Workflow deploy() function

The Deep Learning HDL Toolbox documentation provides a method for deploying the Deep Learning Processor IP Core to a custom board. This method involves using the dlhdl.Workflow deploy function via the JTAG interface, which is dependent on Matlab for deployment.

If I wish to bypass the deploy function, could I consider writing the necessary parameters obtained from the compile function (such as weight data and instruction data) into the DDR memory. I can store these initialization parameters in a ROM and load them into the DDR memory during power-up. I'm not sure what the data format is for these parameters in the DDR memory.

The help documentation only explains the format of image data in the DDR memory, but it doesn't provide information about the data format of these parameters.

I want to use the Deep Learning Processor IP Core offline on the Xilinx Kintex platform.

Answer 1

[Kiran Kintali]

https://www.mathworks.com/help/releases/R2023a/deep-learning-hdl/ug/deploy-simple-adder-network-by-using-MATLAB-deployment-utility-and-delpoyment-file.html

Answer 2

[Steve Kuznicki]

The process to "program" the network is a combination of writing data to DDR and communication with the Deep Learning Processor IP Core. There is a "deploy" option to write out a ".dln" file which is a capture of all the data and commands that are needed to program the network. Bascially you create a "File" target instead of a "Board" target. When the deploy function is executed, a .dln file is created instead. The contents of this dln file could be stored in ROM on your board and used to upon boot-up to program the network.

You can find this information here: https://www.mathworks.com/help/releases/R2023a/deep-learning-hdl/ug/deploy-simple-adder-network-by-using-MATLAB-deployment-utility-and-delpoyment-file.html

DL HDL does not provide any "program DL network" IP Core for FPGA only systems. So for this, you will either need to use a MicroBlaze softcore or another processor on your board to facilitate programming of the network upon boot-up. You can also create a "program network" IP Core that would do this as well.

[Ruikai]

https://ww2.mathworks.cn/matlabcentral/answers/2026739-estimate-the-resource-utilization-for-custom-board-that-has-the-kintex7-chip-family