Internal error in Simulink Design Verifier back end.

This error occured when using simulink design verifier to generate test cases for my simulink model.

There are no explanations for this, any tips?

[Pat Canny]

I recommend contacting MathWorks Technical Support. This question requires more information.

[Maneet Kaur Bagga]

Hi Junhyung,

Can you please share the .dvo file and the .backtrace files of the current directory:

D:\01_git\SWC_ISLA_2021\02_Model\sldv_output\TSR_CmrRecognition