how to solve this error?

조회 수: 2(최근 30일)
冲 陈
冲 陈 2022년 5월 10일
답변: Kiran Kintali 2022년 5월 10일


Kiran Kintali
Kiran Kintali 2022년 5월 10일
Results from FPGA synthesis tool cannot be backannotated to model if they fall within Stateflow Block. This is a known limitation.
Can you reach out to customer support with your reproduction model?

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