Error selecting target in R2020a and Vivado 2020
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Miquel Diego 2022년 3월 22일
편집: Stefanie Schwarz 2022년 9월 16일
I am trying to get familirized with HDL generation from Simulink.
I tried the "workflow advisor" button from upper left corner.
At first stage I tried to select a board, but I got an error, see picture attached.
error: Target platform "XUP Atlys Spartan-6 development board" requires one of the following synthesis tools: Xilinx ISE
I set the HDL tool path using:
I restarted Matlab
it did not helped..
Why is asking for a tool almost 10 years old??
What to do to get rid of the error??
Wang Chen 2022년 3월 22일
편집: Wang Chen 2022년 3월 23일
For Spartan-6 FPGA device, Xilinx requires Xilinx ISE as synthesis tool. You cannot use Xilinx Vivado for Spartan-6 device.
For newer Vivado-based FPGA device like Zynq, Zynq Ultrascale+, Kintex-7, Virtex-7, please use the IP core generation workflow in HDL Workflow Advisor. You can refer to following example to get started:
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Wang Chen 2022년 3월 23일
Virtex-6 is also the older device that is only supported by Xilinx ISE.
Vivado only support Virtex-7 and up. This is the limitation of Xilinx tools.
I highly recommend you use IP core generation workflow for the newer Vivado-based Xilinx devices.
If you want to use the older board (Spartan-6, Virtex-6), please use Xilinx ISE as synthesis tool.
Find more on Xilinx Zynq Platform in Help Center and File Exchange
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