Block to assign initial value for internal signal compatible with HDL coder?

Hello,

I,m using HDL coder. In my design there is a subtract block in a loop, which do -1 each clock cycle, but without an initial value(from my testbench, the default is 0x0000 for the generated code) for the input, the output will cause a data fill-out. That is to say the next value is 0xFFFF. I tried to use a IC block to initialize, but I was told that this block is not supported by HDL coder. I want to initialize an internal signal by 1. Do we have a HDL coder supported block to do that? I'm using MATLAB2013b and Xilinx 14.4 ISE design suite. Thanks.

Answer 1

[Bharath Venkataraman]

If you use the Delay block, you can assign an initial value which HDL Coder uses. Your model will look as follows: Delay block output -> subtract by 1 -> Delay block input

[Beciu Andreea]

But is it possible to have a dynamic value on the initial state ?

In my case, I would like to choose between TWO values for the initial state based on some conditions in the model.

This is possible in basic Simulink by setting the Initial Value as an input to the register block.

However, with HDL Coder R2019a, the register blocks, for exemple "Unit Delay Enabled Resttable Synchronous" does not allow for the initial value to be an input..