Inconsistent sampling time error

Inconsistent sample times. Sample time (9.765625e-06) of 'rtlsdr_QPSK_carrier_timing/Timing Synchronisation Loop (Early Late)/Loop Filter/Add1' is slower than sample time (6.510416666666666e-07) at input port 2. This is likely because there is a loop of blocks, containing 'rtlsdr_QPSK_carrier_timing/Timing Synchronisation Loop (Early Late)/Loop Filter/Add1' that do not specify sample time (all are inherited (-1)). Either specify the sample time of this block or specify sample times for the blocks that drive this block's inputs.

I am getting this error while running a simulink model for QPSK reciever how can i resolve this error