Using Vivado generated .bit file with Embedded coder does not work

Using Vivado generated .bit file with Embedded coder with Zybo board does not work: From what I have read, the ARM processor in Zynq SoC is booting with a Linaro Linux image accordingly the new interface block will speak with the HW IP using memory mapped IO. I thought I could generate my own HW platform using Vivado then using the generated .bit file in Simulink workflow. Therefore, I placed it in the Linaro Linux SD card to configure the FPGA when booting. Then we can use the embedded coder to generate code. There are not enough docs illustrating how Linux will map these IPs into UIO drivers and how the names/address in AXI4 readt/write block will be mapped to physical address that I can get from Vivado.

I was not successful.

A working example will be very helpful.

Kind regards,