Error in simulink model using FPGADataCaptureIP

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Syed Abuzar Shah
Syed Abuzar Shah 2019년 5월 20일
Hello everyone,
I am facing error while running the FPGADataCaptureIP simulink model. Error is as under:
An error occurred while running the simulation and the simulation was terminated
Caused by:
MATLAB System block 'datacapture_model/FPGA Data Reader' error occurred when invoking 'stepImpl' method of 'hdlverifier.internal.DataCapture.SimulinkBlock'. The error was thrown from '
'C:\ProgramData\MATLAB\SupportPackages\R2018b\toolbox\hdlverifier\supportpackages\fpgadebug\+hdlverifier\FPGADataReader.p' at line 0'.
Timeout occurred
When i restart the system, it works fine but after first run this show error. I have run the FPGADataCatureApp, output is fine on logic analyser every time. But i have to show the spectrum of received signal on spectrum analyser in simulink which gives error on running the simulink model.

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