Why is a triggered subsystem activated on the second rising edge

In the demo "sldemo_counters" the counter circuit in the triggered subsystem counts to 1 afther the second rising edge. Why is this the case?

Answer 1

[Sebastian Castro]

It's because of the Unit Delay block "delaying" the output by 1 trigger.

If you move the Unit Delay block to the lower branch of the loop in the Triggered Subsystem (i.e., after the Output port), you get the counter firing on the first rising edge, as you originally expected.

- Sebastian

[JP Thoolen]

Make sense. Thanks!