When I click on "View Code" after generating Verilog code in HDL Coder, the program doesn't respond.

When I click on View Code after generating Verilog code in HDL Coder, the program doesn't respond.
In Simulink, I'm using HDL coder to generate Verilog code. After generating the code, I click "View Code," but it doesn't show the code correctly.

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If you are facing issues with code view please reach out to tech support and submit a bug report.

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Hi,Kiran.
I've run multiple tests and found that when I choose to enable 'Allow clock-rate pipelining of DUT output ports', it causes the visual code traceability to be unavailable.
I'm not sure if this is a bug or an error on my part, but I've raised the issue with tech support.
Thank you very much.
All the options in the configset panel should work without any exception. Thank you.

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R2021b

질문:

2025년 3월 11일

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2025년 3월 12일

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