facing a error while implementing the HDL?

조회 수: 3 (최근 30일)
aijaz
aijaz 2024년 3월 29일
댓글: aijaz 2024년 4월 18일
For the block 'untitled/controller/Discrete fractional Transfer Fcn4/Discrete Zero-Pole' Block 'untitled/controller/Discrete fractional Transfer Fcn4/Discrete Zero-Pole' is not supported for HDL code generation. To continue with code generation, comment out this block.
Error using slhdlcoder.HDLCoder/reporterrors
Block 'untitled/controller/Discrete fractional Transfer Fcn4/Discrete Zero-Pole' is not supported for HDL code generation.
To continue with code generation, comment out this block.

답변 (1개)

T.Nikhil kumar
T.Nikhil kumar 2024년 4월 15일
Hello aijaz,
I get that you are trying to generate HDL code from your Simulink model and are facing an error with one of the blocks.
When you're working with Simulink models for HDL code generation, it's crucial to use blocks that are compatible with HDL code generation. Not all Simulink blocks are supported for this process, and the 'Discrete Zero-Pole' block is one of those that aren't supported. The error message clearly states that the 'Discrete Zero-Pole' block within the 'Discrete fractional Transfer Fcn4' subsystem is not supported for HDL code generation.
You can try to resolve this error with the following methods:
  1. If you are okay with this block’s functionality being absent for the purpose of generating HDL code, you can "comment out" this block. Locate the block inside the subsystem and comment it out by right clicking on the block and selecting ‘Comment Out’ from the menu.
  2. You can look for an alternative approach or block that is supported for HDL generation and replace this block with the new block(s).
Make sure you validate the model to ensure it still behaves as expected after replacing or commenting out the ‘Discrete Zero-Pole’ block.
Refer to the below mentioned documentation to learn about the blocks supported for HDL code generation - https://www.mathworks.com/help/comm/ug/find-blocks-and-system-objects-supporting-hdl-code-generation.html
Hope this answers your query!
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aijaz
aijaz 2024년 4월 18일
if I am commenting out the block after hdl code code generation didnt able to get the proper response and also there is no random block for FOPID but i have tried tthrough the Discrete transfer function block as a controllers equation but i didnt get the response as well as i have used the fixed point approach to solve this issue still in pending and i am confused

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