tristate input in hdl verifier?

조회 수: 1 (최근 30일)

Poorren 2022년 11월 14일

Hi guys,

I met a problem on how to generate tristate bus stimulus in hdl verifier. In details, I need to verify a bus read/write.

So, the data bus need to driven as high impedance during read cycle.

Based on my knowledge, it seems that there's not way to do so. I wonder there is another possible way to accomplish this.

Thanks advance!

Regards,

Jeff

Code Generation HDL Coder

Help Center 및 File Exchange에서 HDL Coder에 대해 자세히 알아보기

Find the treasures in MATLAB Central and discover how the community can help you!

Translated by