I2C Master block in SOC FPGA
조회 수: 4(최근 30일)
I have some confuse for the model I2C Master in SOC library. I see the Sda, scl, sclIn, sdaIn, I don't know how to implement these one in Xilinx hardware because in I2C protocol, It just have only one SDA and SCL.
And I am trying to simulate this model but It not run well, I think It need to have ack signal from slave device.
Do you have any example for I2C master block, please give me.
Kiran Kintali 2022년 8월 29일
Please find attached a sample example of I2C Master and Slave model blocks with behavioral plant models for IMUs.
You can also find I2C Block reference in SoC Blockset here: https://www.mathworks.com/help/soc/ref/i2cmaster.html