The supported official versions of Simulation and Synthesis tools is release dependent and can be found here.
Please note these are the versions that was tested at the time of release of the HDL Coder software (at the time of posting this answer it is R2022a). However, HDL Coder generated code is target synthsis tool version independent. So it does not mean the generated code is not synthesizable in future revisions of these tools. Hope that helps.
HDL Language Support and Supported Third-Party Tools and Hardware (with R2022a)
VHDL and Verilog Language Support
The generated HDL code complies with the following standards:
- VHDL-1993 (IEEE® 1076-1993)
- Verilog-2001 (IEEE 1364-2001)
Third-Party Synthesis Tools and Version Support
The HDL Workflow Advisor is tested with the following third-party FPGA synthesis tools:
- Intel® Quartus® Prime Standard 20.1.1
- Intel Quartus Pro 20.2
- Xilinx® Vivado® Design Suite 2020.2
- Microsemi® Libero® SoC 12.6
- Xilinx ISE 14.7
When you use a synthesis tool that has been tested with the HDL Workflow Advisor and start the workflow, the Advisor generates a list of devices that are supported with that tool. If you use a third-party synthesis tool that is not tested with HDL Workflow Advisor, the Advisor does not update the device list to reflect the FPGA devices that you can use for that tool.
For example, the HDL Workflow Advisor has been tested with Intel Quartus Prime Standard and Intel Quartus Pro. If you use a tool has not been tested with the Advisor, such as Intel Quartus Prime Lite, the FPGA device list does not get updated in the Workflow Advisor.
To use third-party synthesis tools with HDL Coder™, a supported synthesis tool must be installed, and the synthesis tool executable must be on the system path. For details, see Tool Setup.