SoC Builder fails to deploy on Xilinx ZCU104 FPGA Board

조회 수: 30(최근 30일)
I am trying to setup a custom FPGA board with SoC Builder. I'm following this example:
I downloaded the ZCU104 firmware image from Matlab buildroot release mathworks_zynq_R21.2.0
The firmware image works fine and pass all the tests from oscustomizer.
However the test(boardSupportObj, 'feature', 'deployment') failes with the following error:
########## Testing: Deployment ( Load Bitstream ) ##########
### Skip operating system verification ...
gmake: Entering directory `C:/Users/Udara/AppData/Local/Temp/TPA31A~1/soc_prj/dts'
In file included from zynqmp-zcu104-revC.dts:12:0,
from soc_prj.input.dts:1:
zynqmp.dtsi:15:47: fatal error: dt-bindings/dma/xlnx-zynqmp-dpdma.h: No such file or directory
#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
compilation terminated.
gmake: *** [C:\Users\Udara\AppData\Local\Temp\TPA31A~1\soc_prj\dts\soc_prj.output.dts] Error 1
gmake: Leaving directory `C:/Users/Udara/AppData/Local/Temp/TPA31A~1/soc_prj/dts'
Assertion failed in soc.sdk.verify.Deployment[bsName=BoardSupportForZCU104#ext,hwName=ZynqZCU104SoCBoard#ext]/testDeployment and it did not run to completion.
Test Diagnostic:
Error validating Deployment ( Load Bitstream )
Details: Unable to generate dtb file from given dts/dtsi files. Provide corresponding board dts/dtsi files during Custom Target creation and rerun the socBuilder.
Reproduction Steps: 1. Add C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\testmodels to MATLAB path
2. Open mSoCRamp
3. From the Apps Gallery, select System On Chip (SoC) and set Hardware Board to Zynq ZCU104 SoC Board
4. Click on Configure Build & Deploy and step through the screens
Stack Information:
In C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\+soc\+sdk\+verify\errorFree.p (errorFree) at 0
In C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\+soc\+sdk\+verify\Deployment.p (Deployment.testDeployment) at 0
Failure Summary:
Name Failed Incomplete Reason(s)
soc.sdk.verify.Deployment[bsName=BoardSupportForZCU104#ext,hwName=ZynqZCU104SoCBoard#ext]/testDeployment X X Failed by assertion.
Features Results
______________ __________
{'Deployment'} {'Failed'}
This issue seems related to dtsSrc and dtsSrcInc files in my createCustomBoard.m. I already tried following changes but none of them worked for me.
  1. srcFiles.dtSrcFiles = {}; and srcFiles.dtIncFiles = {};
  2. srcFiles.dtSrcFiles = {'zynqmp-zcu104-revA.dts'}; and srcFiles.dtIncFiles = {'zynqmp.dtsi','zynqmp-clk.dtsi','zynqmp-clk-ccf.dtsi'};
  3. srcFiles.dtSrcFiles = {'zynqmp-zcu104-revC.dts'}; and srcFiles.dtIncFiles = {'zynqmp.dtsi','zynqmp-clk.dtsi','zynqmp-clk-ccf.dtsi'};
I have all these dts and dtsi files downloaded from analogdvices/linux repository to my current working directory. I also tried adding dt-bindings folder from analogdevices repository to my working directory. That also did not work.
I have been stucked at this point for several months now as you can see from my older question in the forum
I would really apprecieate it if someone can help me resolve this issue soon. Thank you for your support.
Best Regards,
  댓글 수: 2
Udara De Silva
Udara De Silva 2022년 11월 22일
Hi Andrew,
Thank you for your response. I revisited my attempt to get ZCU104 work with SoC Blockset today and followed your suggestions about soc_hwsw_stream.slx. I can get the simulation to work. In the external mode the program gets uploaded but the soc_hwsw_top_sw.slx fails to run in the external mode saying "Error occurred while executing External Mode MEX-file 'ext_comm'"
In the serial console I get the following errors after the board get rebooted with the new image:
[ 6.702156] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: Error: failed to create device node mwfpga_algorithm_wrapper_ip, err -17
[ 6.714000] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: mwipcore device addition failed: -17
[ 6.722709] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: MathWorks IP device registration failed: -17
[ 6.732125] mwipcore: probe of a0000000.mwfpga_algorithm_wrapper_ip failed with error -17
[ 10.348101] macb ff0e0000.ethernet eth0: link up (1000/Full)
[ 10.353788] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
Please let me know if you have any thoughts on how to debug this issue.
Best Regards,

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Kiran Kintali
Kiran Kintali 2023년 3월 6일
HDL Coder workflow to add a custom ZCU104 board
Once you create the custom reference design you can follow the steps in this example deploy to your new board registered with HDL Coder.
To connect between PS and PL you may also want to follow this example create a custom linux image.

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