SoC Builder fails to deploy on Xilinx ZCU104 FPGA Board

I am trying to setup a custom FPGA board with SoC Builder. I'm following this example:

https://www.mathworks.com/help/supportpkg/xilinxsoc/ug/Using-a-Custom-Board-with-SoC-Blockset.html

I downloaded the ZCU104 firmware image from Matlab buildroot release mathworks_zynq_R21.2.0

https://github.com/mathworks/buildroot/releases/tag/mathworks_zynq_R21.2.0

The firmware image works fine and pass all the tests from oscustomizer.

However the test(boardSupportObj, 'feature', 'deployment') failes with the following error:

########## Testing:  Deployment ( Load Bitstream ) ##########
### Skip operating system verification ...
gmake: Entering directory `C:/Users/Udara/AppData/Local/Temp/TPA31A~1/soc_prj/dts' 
[Pre-processing] 
In file included from zynqmp-zcu104-revC.dts:12:0, 
                 from soc_prj.input.dts:1: 
zynqmp.dtsi:15:47: fatal error: dt-bindings/dma/xlnx-zynqmp-dpdma.h: No such file or directory 
 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 
                                               ^ 
compilation terminated. 
gmake: *** [C:\Users\Udara\AppData\Local\Temp\TPA31A~1\soc_prj\dts\soc_prj.output.dts] Error 1 
gmake: Leaving directory `C:/Users/Udara/AppData/Local/Temp/TPA31A~1/soc_prj/dts' 

================================================================================
Assertion failed in soc.sdk.verify.Deployment[bsName=BoardSupportForZCU104#ext,hwName=ZynqZCU104SoCBoard#ext]/testDeployment and it did not run to completion.
    ----------------
    Test Diagnostic:
    ----------------
    Error validating  Deployment ( Load Bitstream )
    Details: Unable to generate dtb file from given dts/dtsi files. Provide corresponding board dts/dtsi files during Custom Target creation and rerun the socBuilder.
    Reproduction Steps: 1. Add C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\testmodels to MATLAB path
    2. Open mSoCRamp
    3. From the Apps Gallery, select System On Chip (SoC) and set Hardware Board to Zynq ZCU104 SoC Board
    4. Click on Configure Build & Deploy and step through the screens
    
    ------------------
    Stack Information:
    ------------------
    In C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\+soc\+sdk\+verify\errorFree.p (errorFree) at 0
    In C:\ProgramData\MATLAB\SupportPackages\R2021b\toolbox\soc\supportpackages\sdk\+soc\+sdk\+verify\Deployment.p (Deployment.testDeployment) at 0
================================================================================

======================================================================
Failure Summary:

     Name                                                                                                      Failed  Incomplete  Reason(s)
    ====================================================================================================================================================
     soc.sdk.verify.Deployment[bsName=BoardSupportForZCU104#ext,hwName=ZynqZCU104SoCBoard#ext]/testDeployment    X         X       Failed by assertion.

======================================================================
       Features        Results  
    ______________    __________

    {'Deployment'}    {'Failed'}


======================================================================

This issue seems related to dtsSrc and dtsSrcInc files in my createCustomBoard.m. I already tried following changes but none of them worked for me.

1. srcFiles.dtSrcFiles = {}; and srcFiles.dtIncFiles = {};
2. srcFiles.dtSrcFiles = {'zynqmp-zcu104-revA.dts'}; and srcFiles.dtIncFiles = {'zynqmp.dtsi','zynqmp-clk.dtsi','zynqmp-clk-ccf.dtsi'};
3. srcFiles.dtSrcFiles = {'zynqmp-zcu104-revC.dts'}; and srcFiles.dtIncFiles = {'zynqmp.dtsi','zynqmp-clk.dtsi','zynqmp-clk-ccf.dtsi'};

I have all these dts and dtsi files downloaded from analogdvices/linux repository to my current working directory. I also tried adding dt-bindings folder from analogdevices repository to my working directory. That also did not work.

I have been stucked at this point for several months now as you can see from my older question in the forum

https://www.mathworks.com/matlabcentral/answers/1636970-adding-xilinx-zcu104-board-to-soc-blockset

I would really apprecieate it if someone can help me resolve this issue soon. Thank you for your support.

Best Regards,

Udara

[Andrew Brennan]

Hi Udara,

Several things:

1. test(boardsupportobj); Doesnt work fully as described - I could only get Hardware & Simulation to work for the ZCU106. Mathworks rep said dont worry about it not working (take away msg appears they arent keeping it (test) supported.) Look at doc test! i.e. test(boardSupportObj,'feature',featureName)
2. test apparently uses mSoCRamp.slx associated example in: c:\ProgramData\MATLAB\SupportPackages\R2021a\toolbox\soc\supportpackages\sdl\testmodels
3. I couldnt get this to work fully due to dated firmware. But if you have been able to get a firmware build using the Petalinux tool then I would be very interested in hearing about the issues. (I cant get buildroot to build kernel source but obtained a kernel image I would be happy to share with you subject to Mathworks approval :). There is still some bugs with that version (5.4) and I still dont know what source they used on GitHub.
4. I was able to get the design example soc_hwsw_stream.slx finally to work - happy to share that with you.
5. Let me know what Matlab environment, etc you are using (>>ver,>>matlab.addons.installedAddons, etc.) Windows/Linux etc.

chat later

Andrew

[Udara De Silva]

Hi Andrew,

Thank you for your response. I revisited my attempt to get ZCU104 work with SoC Blockset today and followed your suggestions about soc_hwsw_stream.slx. I can get the simulation to work. In the external mode the program gets uploaded but the soc_hwsw_top_sw.slx fails to run in the external mode saying "Error occurred while executing External Mode MEX-file 'ext_comm'"

In the serial console I get the following errors after the board get rebooted with the new image:

[ 6.702156] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: Error: failed to create device node mwfpga_algorithm_wrapper_ip, err -17

[ 6.714000] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: mwipcore device addition failed: -17

[ 6.722709] mwipcore a0000000.mwfpga_algorithm_wrapper_ip: MathWorks IP device registration failed: -17

[ 6.732125] mwipcore: probe of a0000000.mwfpga_algorithm_wrapper_ip failed with error -17

[ 10.348101] macb ff0e0000.ethernet eth0: link up (1000/Full)

[ 10.353788] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

Please let me know if you have any thoughts on how to debug this issue.

Best Regards,

Udara

Answer 1

[Kiran Kintali]

HDL Coder workflow to add a custom ZCU104 board

https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-zynq-workflow.htmlto Create a custom board and reference design for zynq ZCU104 boards

Once you create the custom reference design you can follow the steps in this example https://www.mathworks.com/help/hdlcoder/ug/getting-started-with-hardware-software-codesign-workflow-for-zynq-ultrascale-mpsoc-devices.htmlto deploy to your new board registered with HDL Coder.

To connect between PS and PL you may also want to follow this example https://www.mathworks.com/help/hdlcoder/ug/xilinx-zynq-linux-image-for-custom-boards.htmlto create a custom linux image.