how can I make the input to HDL FIFO Scalar ?
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I have used the HDL FIFO block of dhldemolib in Simulink but when i start "Run compatibility check" to generate the VHDL code, an error appears which state that the HDL FIFO only supports a scalar input. how can I solve such a problem. i tried too many solutions but non of them works ??? any one can help me, please?
답변 (1개)
Tim McBrayer
2014년 4월 14일
The signal attached to the HDL FIFO's 'In' port must be a scalar; its dimensions must be static, a [1x1] matrix. To help you understand what your Simulink signal dimensions are, make sure the following settings are selected on your model:
Display>Signals & Ports>Signal Dimensions
Display>Signals & Ports>Wide Nonscalar Lines
The Display>Signals & Ports>Port Data Types setting can also be very useful in diagnosing type issues in Simulink.
댓글 수: 2
Esmail Abo-basha
2014년 4월 15일
편집: Esmail Abo-basha
2014년 4월 15일
Esmail Abo-basha
2014년 4월 17일
카테고리
도움말 센터 및 File Exchange에서 Code Generation에 대해 자세히 알아보기
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