Difference between unit delay block and memory block

Could anybody over here please explain me the difference in working and application between unit delay block and memory block.

Answer 1

[Wayne King]

When the Memory block inherits a discrete sample time, the block is analogous to the Unit Delay block. However, the Memory block does not support state logging. If logging the final state is necessary, use a Unit Delay block instead.

This is documented in the reference page for the memory block.

[Tong Zhao]

Can you explain more about the difference between "discrete sample time that you specify" and "one major integration time step"? The former is described for "Unit Delay" and the later for "Memory", in the documentation page for "Memory".