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Model Design and Compatibility Guidelines

Best practices for creating HDL-compatible Simulink model, clock bundle generation, and native floating-point

The HDL modeling guidelines are a set of recommended guidelines for creating Simulink® models, MATLAB Function blocks, and Stateflow® charts for code generation with HDL Coder™. The model design and compatibility guidelines consist of guidelines for basic block usage, clock and reset signals, buses and vectors, and subsystem and hierarchical designing.


List of Guidelines and Severity Levels

Model Design and Compatibility Guidelines - By Numbered List

List of supported blocks and data type guidelines in ascending order of Guideline ID.

HDL Modeling Guidelines Severity Levels

Various severity levels associated with the HDL modeling guidelines and their description.

Basic Model Design and Compatibility Guidelines (Guideline ID 1.1)

Basic Guidelines for Modeling HDL Algorithm in Simulink

High-level guidelines to create your HDL algorithm in Simulink model.

Guidelines for Model Setup and Checking Model Compatibility

Set up and configure your Simulink model for HDL code generation compatibility.

Modeling with Simulink, Stateflow, and MATLAB Function Blocks

Learn how to model using Simulink blocks, MATLAB Function blocks, and Stateflow blocks.

Terminate Unconnected Block Outputs and Usage of Commenting Blocks

Learn why you must terminate block outputs and how to comment out blocks for code generation.

Identify and Programmatically Change and Display HDL Block Parameters

Learn how to adjust block sizes, annotate block parameters, and find and change parameters.

DUT Subsystem and Hierarchical Modeling Guidelines (Guideline ID 1.2)

DUT Subsystem Guidelines

Considerations for using the DUT Subsystem for HDL code and test bench generation.

Hierarchical Modeling Guidelines

Design considerations when building your Simulink model hierarchically for HDL code generation.

Guidelines for Buses and Vectors (Guideline ID 1.3)

Design Considerations for Matrices and Vectors

Learn how to efficiently use vectors and matrix data types in HDL Coder.

Use Bus Signals to Improve Readability of Model and Generate HDL Code

Learn how to improve model readability by using bus signals and generate HDL code.

Guidelines for Clock Bundle and Native Floating Point (Guideline ID 1.4 - 1.5)

Guidelines for Clock and Reset Signals

Clock, reset, and clock enable signal considerations.

Modeling with Native Floating Point

Understand best practices for using native floating-point support in HDL Coder.