Complex Burst QR Decomposition
R2026bQR decomposition for complex-valued matrices
Complex Burst QR Decomposition block

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Libraries:
Fixed-Point Designer HDL Support /
Matrices and Linear Algebra /
Matrix Factorizations
Description
The Complex Burst QR Decomposition block uses QR decomposition to compute R and C = Q'B, where QR = A, and A and B are complex-valued matrices. The least-squares solution to Ax = B is x = R\C. R is an upper triangular matrix and Q is an orthogonal matrix. To compute C = Q', set B to be the identity matrix.
When Regularization parameter is nonzero, the
Complex Burst QR Decomposition block transforms in-place to and in-place to where λ is the regularization parameter, QR is the
economy size QR decomposition of , A is an m-by-n
matrix, p is the number of columns in B,
In =
eye(n), and
0n,p =
zeros(n,p).
Examples
Implement Hardware-Efficient Complex Burst QR Decomposition
How to use the Complex Burst QR Decomposition block.
Determine Fixed-Point Types for QR Decomposition
Use fixed.qrFixedpointTypes to determine fixed-point types for
computation of QR decomposition.
Ports
Input
Rows of matrix A, specified as a vector. A is an m-by-n matrix where m ≥ 2 and n ≥ 2. If B is single or double, A must be the same data type as B. If A is a fixed-point data type, A must be signed, use binary-point scaling, and have the same word length as B. Slope-bias representation is not supported for fixed-point data types.
Data Types: single | double | fixed point
Complex Number Support: Yes
Rows of matrix B, specified as a vector. B is an m-by-p matrix where m ≥ 2. If A is single or double, B must be the same data type as A. If B is a fixed-point data type, B must be signed, use binary-point scaling, and have the same word length as A. Slope-bias representation is not supported for fixed-point data types.
Data Types: single | double | fixed point
Complex Number Support: Yes
Whether inputs are valid, specified as a Boolean scalar. This control signal
indicates when the data from the A(i,:) and
B(i,:) input ports are valid. When this value is 1
(true) and the value at ready is 1
(true), the block captures the values on the
A(i,:) and B(i,:) input ports. When this
value is 0 (false), the block ignores the input samples.
After sending a true
validIn signal, there may be some delay before
ready is set to false. To ensure all data is
processed, you must wait until ready is set to
false before sending another true
validIn signal.
Data Types: Boolean
Whether to clear internal states, specified as a Boolean scalar. When this value
is 1 (true), the block stops the current calculation and clears all
internal states. When this value is 0 (false), and the
validIn value is 1 (true), the block begins
a new subframe.
Data Types: Boolean
Output
Rows of the economy size QR decomposition matrix R, returned as a scalar or vector. R is an upper triangular matrix. The size of the matrix R is min(m,n)-by-n. R has the same data type as A.
Data Types: single | double | fixed point
Rows of the economy size QR decomposition matrix C=Q'B, returned as a scalar or vector. C has the same number of rows as R. C has the same data type as B.
Data Types: single | double | fixed point
Whether the output data is valid, returned as a Boolean scalar. This control
signal indicates when the data at output ports R(i,:) and
C(i,:) is valid. When this value is 1
(true), the block has successfully computed the
R and C matrices. When this value is 0
(false), the output data is not valid.
Data Types: Boolean
Whether the block is ready, returned as a Boolean scalar. This control signal
indicates when the block is ready for new input data. When this value is 1
(true), and the validIn value is 1
(true), the block accepts input data in the next time step. When
this value is 0 (false), the block ignores input data in the next
time step.
After sending a true
validIn signal, there may be some delay before
ready is set to false. To ensure all data is
processed, you must wait until ready is set to
false before sending another true
validIn signal.
Data Types: Boolean
Parameters
Main
The number of rows in matrices A and B, specified as a positive integer-valued scalar.
Programmatic Use
Block Parameter:
m |
| Type: character vector |
| Values: positive integer-valued scalar |
Default:
4 |
The number of columns in input matrix A, specified as a positive integer-valued scalar.
Programmatic Use
Block Parameter:
n |
| Type: character vector |
| Values: positive integer-valued scalar |
Default:
4 |
The number of columns in input matrix B, specified as a positive integer-valued scalar.
Programmatic Use
Block Parameter:
p |
| Type: character vector |
| Values: positive integer-valued scalar |
Default:
1 |
Regularization parameter, specified as a nonnegative scalar. Small, positive values of the regularization parameter can improve the conditioning of the problem and reduce the variance of the estimates. While biased, the reduced variance of the estimate often results in a smaller mean squared error when compared to least-squares estimates.
Programmatic Use
Block Parameter:
regularizationParameter |
| Type: character vector |
| Values: real nonnegative scalar |
Default:
0 |
Implementation
Constant multiplication implementation, specified as one of these values:
CSD— Canonical Signed Digit (CSD) technique, which uses only shift-add operations.Multiplier— Multiplication operation,*.
Tips
Use this parameter to help balance use of different resources on hardware.
For more information on the CSD technique, see Constant Multiplier Optimization to Reduce Area (HDL Coder).
Programmatic Use
To set the block parameter value programmatically, use
the set_param function.
To get the block parameter value
programmatically, use the get_param function.
| Parameter: | ConstMultiplier |
| Values: | CSD (default) | Multiplier |
| Data Types: | string | char |
Data type of inverse CORDIC gain, specified as Inherit: Same word length
as input, fixdt(0,16), or as a user-specified data type
expression.
Tips
Use this parameter to fine-tune the quantization of the internal gain value and trade off between hardware resource utilization and numeric precision.
Programmatic Use
To set the block parameter value programmatically, use
the set_param function.
To get the block parameter value
programmatically, use the get_param function.
| Parameter: | MultiplierDataTypeStr |
| Values: | Inherit: Same word length as
input (default) | fixdt(0,16) | <data type expression> |
| Data Types: | string | char |
Tips
Use fixed.getQRDecompositionModel(A,B) to generate a template model
containing a Complex Burst QR Decomposition block for complex-valued input
matrices A and B.
Algorithms
Systolic implementations prioritize speed of computations over space constraints, while burst implementations prioritize space constraints at the expense of speed of the operations. The following table illustrates the tradeoffs between the implementations available for matrix decompositions and solving systems of linear equations.
| Implementation | Throughput | Latency | Area |
|---|---|---|---|
| Systolic | High | O(nlog2(m)) | O(mn2) |
| Partial-Systolic | Medium | O(mn) | O(n2) |
| Burst | Low | O(mn) | O(n) |
Where m is the number of rows in matrix A and n is the number of columns in matrix A. Regardless of architecture, a larger word length results in lower throughput, larger latency, and larger area.
For additional considerations in selecting a block for your application, see Choose a Block for HDL-Optimized Fixed-Point Matrix Operations.
This block uses the AMBA AXI handshake protocol [1]. The valid/ready handshake process is used to transfer data and control information. This two-way control mechanism allows both the manager and subordinate to control the rate at which information moves between manager and subordinate. A valid signal indicates when data is available. The ready signal indicates that the block can accept the data. Transfer of data occurs only when both the valid and ready signals are high.
The Burst QR Decomposition blocks accept and process A and B matrices row by row synchronously. After accepting m rows, the block outputs the R and C matrices row by row continuously. The matrices are output from the last row to the first row.
For example, assume that the input A and B matrices
are 3-by-3. Additionally assume that validIn asserts before
ready, meaning that the upstream data source is faster than the QR
decomposition.

In the figure,
A1r1is the first row of the first A matrix,R1r3is the third row of the first R matrix, and so on.validIntoready— From a successful row input to the block being ready to accept the next row.Last row
validIntovalidOut— From the last row input to the block starting to output the solution.validOuttoready— From the block starting to output the solution to the block ready to accept the next matrix input.
The following table provides details of the timing for the Burst QR Decomposition blocks.
| Block | validIn to ready (cycles) | Last Row validIn to validOut
(cycles) | validOut to ready (cycles) |
|---|---|---|---|
| Real Burst QR Decomposition | (wl + 5)*min(m,n) + 2 | (wl + 5)*min(m,n) + 2 | min(m,n) + 1 |
| Complex Burst QR Decomposition | (wl*2 + 11)*min(m,n) + 2 | (wl*2 + 11)*min(m,n) + 2 | min(m,n) + 1 |
In the table, m represents the number of rows in matrix A, and n is the number of columns in matrix A. wl represents the word length of the input data.
If the data type of A is double, then wl is 53.
If the data type of A is single, then wl is 24.
If the data types of A and B are fixed point, then wl is given by
max(A.WordLength + ~issigned(A), B.WordLength + ~issigned(B))
This block supports HDL code generation using the Simulink® HDL Workflow Advisor. For an example, see HDL Code Generation and FPGA Synthesis from Simulink Model (HDL Coder) and Implement Digital Downconverter for FPGA (DSP HDL Toolbox).
This example data was generated by synthesizing the block on a Xilinx® Zynq® UltraScale™ + RFSoC ZCU111 evaluation board. The synthesis tool was Vivado® v.2025.1 (glnx64).
The following parameters were used for synthesis.
Block parameters:
m = 16n = 16p = 1Matrix A dimension: 16-by-16
Matrix B dimension: 16-by-1
Input data type:
sfix16_En14CORDIC inverse gain data type:
Inherit: Same word length as input
Hardware resource utilization results are provided for both CSD and
Multiplier implementations for comparison.
The following tables show the post-synthesis resource utilization results and timing summary, respectively.
CSD| Resource | Usage | Available | Utilization (%) |
|---|---|---|---|
| CLB LUTs | 15034 | 425280 | 3.54 |
| CLB Registers | 9969 | 850560 | 1.17 |
| DSPs | 0 | 4272 | 0.00 |
| Block RAM Tile | 0 | 1080 | 0.00 |
| URAM | 0 | 80 | 0.00 |
| Value | |
|---|---|
| Requirement | 3.3333 ns (300 MHz) |
| Data Path Delay | 1.624 ns |
| Slack | 1.692 ns |
| Clock Frequency | 609.26 MHz |
Multiplier| Resource | Usage | Available | Utilization (%) |
|---|---|---|---|
| CLB LUTs | 11051 | 425280 | 2.60 |
| CLB Registers | 6709 | 850560 | 0.79 |
| DSPs | 68 | 4272 | 1.59 |
| Block RAM Tile | 0 | 1080 | 0.00 |
| URAM | 0 | 80 | 0.00 |
| Value | |
|---|---|
| Requirement | 3.3333 ns (300 MHz) |
| Data Path Delay | 1.712 ns |
| Slack | 1.692 ns |
| Clock Frequency | 582.30 MHz |
References
[1] "AMBA AXI and ACE Protocol Specification Version E." https://developer.arm.com/documentation/ihi0022/e/
Extended Capabilities
Slope-bias representation is not supported for fixed-point data types.
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
This block has one default HDL architecture.
| General | |
|---|---|
| ConstrainedOutputPipeline | Number of registers to place at
the outputs by moving existing delays in the design. Distributed pipelining
does not redistribute these registers. The default value is
|
| InputPipeline | Number of input pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default value is
|
| OutputPipeline | Number of output pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default value is
|
Supports fixed-point data types only.
Version History
Introduced in R2019bSeveral improvements have been made to the Real Burst QR Decomposition, Complex Burst QR Decomposition, Real Burst Matrix Solve Using QR Decomposition, and Complex Burst Matrix Solve Using QR Decomposition blocks:
HDL resource utilization has been further optimized to require fewer hardware resources. The reduction in resource utilization includes changes to both the algorithm and the implementation. Numeric outputs are not bit-exact with previous releases, but have the same noise floor.
These blocks now allow you to choose the implementation of the constant multiplication between a multiplication operation or the previously existing canonical signed digit (CSD) technique, which uses only shift-add operations.
The Complex Burst QR Decomposition block now supports the Tikhonov Regularization parameter.
This block now has an improved algorithm to reduce resource utilization on hardware-constrained target platforms.
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