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This block provides Camera Link pixel stream decoding for the DALSA Spyder 3 camera with 1k pixels and 2 taps (Model Nr. S3-20-01k40). It is intended for code generation with HDL Coder and was tested with Xilinx Vivado on an Artix 7 FPGA.
The block outputs the camera lines with a latency of one line period. This is because the pixels do not arrive ordered and have to be buffered. Valid line data is signalled by a high level on the line_valid output.
인용 양식
Felix Schneider (2026). DALSA Spyder 3 Camera Link decoder (for HDL Coder) (https://kr.mathworks.com/matlabcentral/fileexchange/73564-dalsa-spyder-3-camera-link-decoder-for-hdl-coder), MATLAB Central File Exchange. 검색 날짜: .
| 버전 | 퍼블리시됨 | 릴리스 정보 | Action |
|---|---|---|---|
| 1.0.0 |
