HDL Coder Support Package for Xilinx FPGA Boards

Generate and deploy HDL code for Xilinx development boards

HDL Coder™ Support Package for Xilinx®FPGA Boards enables IP core generation workflow to program supported Xilinx FPGAs. The IP core generation workflow helps you map your algorithm I/O to onboard interfaces, generate HDL code, and synthesize the generated code. HDL Coder also provides integration with Xilinx Vivado® or Xilinx ISE to synthesize the generated code into a bitstream that you can directly download on to Xilinx FPGA development boards.

This support package is functional for R2013b up through R2023b. For R2024a and beyond, Xilinx FPGA Boards support is provided via HDL Coder Support Package for Xilinx FPGA and SoC Devices.