Shift Register implementation using Simulink
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Hello,
I am trying to implement a model to calculate the CRC of the Received Bit Vector.
Please suggest me the technique how can we implement a shift Register with some initial content.
Regards Kiran
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Kaustubha Govind
2011년 4월 4일
You should be able to implement this using cascaded Unit Delay blocks. Program the "initial conditions" for the blocks with the desired initial output.
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timo
2016년 9월 25일
I am also interested in this Can someone share an example with the unit delay blocks ?
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Ralf Zaeper
2019년 3월 4일
편집: Ralf Zaeper
2019년 3월 4일
Attached a simple two level shift register in Simulink. Switch and memory blocks make up Kaustubha's suggested cascaded approach. A random number is captured at given trigger times, here generated every four steps, and shifted through the two stages.
The scope shows overall step counter, the two shift level contents and the trigger signal.
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