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Download bit file to Zynq from HDL Coder

조회 수: 4 (최근 30일)
Brent  Jarvis
Brent Jarvis 2017년 4월 28일
댓글: zhouwb02 2021년 1월 8일
Hi,
I am working with HDL Coder. How can I deploy a previously generated bitfile to my ZC706 once I have generated the code using HDL Coder. For some reason it seems like I need to rebuild the bitstream in the HDL Coder Workflow in order to re-deploy the bitfile. Can you help with this?
For instance, I power cycle the Zynq board edit my ARM code and then want to redeploy the same bitfile to the Zynq chip.
Thanks,

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Tao Jia
Tao Jia 2017년 5월 5일
편집: Tao Jia 2017년 5월 5일
If you know the location of your FPGA programming file, you can always use Vivado to program the FPGA. Also, there is a MATLAB utility function that can do this - run "help filProgramFPGA" in MATLAB to check it out.
Hope this helps, Tao
  댓글 수: 2
Brent  Jarvis
Brent Jarvis 2017년 6월 6일
편집: Brent Jarvis 2017년 6월 6일
I have begun using Vivado for this task. Thanks for the suggestion. After using the toolchain a bit more, I have realized Vivado will play a big part while implementing and deploying code/bitstreams.
zhouwb02
zhouwb02 2021년 1월 8일
From the filProgramFPGA help,
filProgramFPGA('Xilinx Vivado', PROGRAMFILE,CHAINPOSITION)
programs Xilinx FPGA at JTAG chain position CHAINPOSITION using the
programming file PROGRAMFILE and Xilinx Vivado tool.
How to define the CHAINPOSITION value?

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