Try to create Vivado project with HDL coder

Hello! I am attempting to create a Vivado project using HDL Coder within Simulink, but I encountered an issue with the workflow advisor. The error message I received is:

"ERROR: [Board 49-71] The 'board_part' definition could not be found for 'avnet.com:zedboard:part0:1.4'. Although the project's 'part' property was set to 'xc7z020clg484-1', the 'board_part' property was not defined for the project."

In the Vivado platform, I have the Zedboard file, and I have also installed the necessary support packages for both hardware and design on Xilinx boards. I am unsure how to properly configure the board files. Could you please guide me on how to address this issue and set up the board files correctly?

Answer 1

[recent works]

The error message you are getting is saying that the Vivado project cannot find the board definition for the Zedboard board. This can happen if the board definition is not installed correctly, or if the board part is not set correctly in the Vivado project.

To fix this issue, you need to make sure that the board definition for the Zedboard is installed correctly. You can do this by following these steps:

1. Open the Vivado IDE.
2. In the Project Manager window, click on the Settings tab.
3. In the Board Settings section, click on the Board File field.
4. Browse to the location of the Zedboard board definition file.
5. Click on the Open button.

Once the board definition is installed correctly, you need to set the board part in the Vivado project. You can do this by following these steps:

1. In the Project Manager window, right-click on the project name and select Properties.
2. In the Project Properties dialog box, select the Device and Board tab.
3. In the Board Part field, select the Zedboard board part.
4. Click on the OK button.

Once you have set the board part correctly, you should be able to create the Vivado project without any errors.

[hovav dimri]

TNX allot!

Answer 2

[Julio Magro Sastre]

This solution did not work for me. However I found an alternative workaround. I am using MATLAB R2023b and Xilinx Vivado 2022.1, but this should work with other versions too.

What I did was to download the 1.4 version of the ZedBoard files from this page:

https://github.com/Avnet/bdf/tree/master/zedboard/1.4

Then I added the files to the path C:/Xilinx/Vivado/2022.1/data/boards/board_files/zedboard. Here you should have a folder with a 1.3 version (this is from installing the board files as per the Digilent instructions). Just add a folder named "1.4" with the downloaded files inside the zedboard folder.

When launching HDL Workflow Advisor and creating a project with Vivado there should be no issues.

Hope it helps,

J.

[Sam]

Thanks! This worked for me. I needed to create the folder "board_files".

C:\Xilinx\Vivado\2022.1\data\boards\board_files\zedboard\1.4

and copied all the files from your link. The project is compiling now