How to initialize Xilinx UltraRAMs?
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I'd like to use UltraRAMs to store what are essentially filter coefficients (there's about 20 K values, 26 bits of precision). Right now, I use the Simple Dual Port RAM System and initialize it from a vector in the Matlab workspace. This shows up in Verilog as 64K lines of initialization.
My understanding of UltraRAMs is that you can't initialize them to an arbitrary set of values - they don't work the same as BlockRAMs. Vivado seems to be ignoring the "ultra" RAMDirective for this usage, and that's the only explanation I can think of.
Is there a way around this? I'm thinking of something where I have to "manually" write the initialization in the module where the RAM is located, and have it run on startup, but which seems fraught with complications. BlockRAMs work perfectly fine, but I have lots of UltraRAMs, and since BlockRAMs are more flexible, I want to save them for other parts of the system that need that flexibility.